Decision feedback equalizer using soft decisions
    1.
    发明授权
    Decision feedback equalizer using soft decisions 失效
    决策反馈均衡器使用软判决

    公开(公告)号:US07822114B2

    公开(公告)日:2010-10-26

    申请号:US11761586

    申请日:2007-06-12

    IPC分类号: H03H7/30

    摘要: A decision feedback equalizer (DFE) and method include at least two paths. Each path includes the following. An adder is configured to sum an input with a first feedback tap fed back from a different path. A latch is coupled to the adder to receive a summation signal as input. The latch includes a transparent state, and an output of the latch is employed as the first tap in a feedback path to an adder of a different path, wherein a partially resolved first tap in the feedback path is employed during the transparent state to provide a soft decision to supply correction information in advance of a hard decision of the latch.

    摘要翻译: 决策反馈均衡器(DFE)和方法包括至少两个路径。 每个路径包括以下内容。 加法器被配置为将输入与从不同路径反馈的第一反馈分接相加。 锁存器耦合到加法器以接收加法信号作为输入。 锁存器包括透明状态,并且锁存器的输出被用作到到不同路径的加法器的反馈路径中的第一抽头,其中在透明状态期间采用反馈路径中的部分分辨的第一抽头以提供一个 软判决在锁存器的硬判决之前提供校正信息。

    DECISION FEEDBACK EQUALIZER USING SOFT DECISIONS
    2.
    发明申请
    DECISION FEEDBACK EQUALIZER USING SOFT DECISIONS 失效
    决策反馈平均使用软决策

    公开(公告)号:US20080310495A1

    公开(公告)日:2008-12-18

    申请号:US11761586

    申请日:2007-06-12

    IPC分类号: H04L27/01

    摘要: A decision feedback equalizer (DFE) and method include at least two paths. Each path includes the following. An adder is configured to sum an input with a first feedback tap fed back from a different path. A latch is coupled to the adder to receive a summation signal as input. The latch includes a transparent state, and an output of the latch is employed as the first tap in a feedback path to an adder of a different path, wherein a partially resolved first tap in the feedback path is employed during the transparent state to provide a soft decision to supply correction information in advance of a hard decision of the latch.

    摘要翻译: 决策反馈均衡器(DFE)和方法包括至少两个路径。 每个路径包括以下内容。 加法器被配置为将输入与从不同路径反馈的第一反馈分接相加。 锁存器耦合到加法器以接收加法信号作为输入。 锁存器包括透明状态,并且锁存器的输出被用作到到不同路径的加法器的反馈路径中的第一抽头,其中在透明状态期间采用反馈路径中的部分分辨的第一抽头以提供一个 软判决在锁存器的硬判决之前提供校正信息。