公开(公告)号：US20080007292A1

公开(公告)日：2008-01-10

申请号：US11858330

申请日：2007-09-20

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： H03K19/177

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to Vcc through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1多路复用器。 非易失性存储晶体管耦合到多路复用器的n个输入端中的每一个。 如本领域已知的那样，多路复用器具有x地址输入，其中2 = n。 多路复用器的输出通过上拉晶体管耦合到V cc。 上拉晶体管的栅极耦合到具有耦合到多路复用器的地址输入的输入的地址转换检测器电路的输出。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US07538576B2

公开(公告)日：2009-05-26

申请号：US11858341

申请日：2007-09-20

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： G06F7/38 ,  H03K19/177

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to VCC through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1复用器。 非易失性存储晶体管耦合到多路复用器的n个输入端中的每一个。 多路复用器具有x地址输入，其中2x = n，如本领域已知的。 多路复用器的输出通过上拉晶体管耦合到VCC。 上拉晶体管的栅极耦合到具有耦合到多路复用器的地址输入的输入的地址转换检测器电路的输出。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US20070047330A1

公开(公告)日：2007-03-01

申请号：US11551973

申请日：2006-10-23

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： G11C7/10

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to VCC through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1多路复用器。 非易失性存储晶体管耦合到多路复用器的n个输入端中的每一个。 如本领域已知的那样，多路复用器具有x地址输入，其中2 = n。 多路复用器的输出通过上拉晶体管耦合到V CC。 上拉晶体管的栅极耦合到具有耦合到多路复用器的地址输入的输入的地址转换检测器电路的输出。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US07129748B1

公开(公告)日：2006-10-31

申请号：US11026336

申请日：2004-12-29

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： H03K19/177

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to VCC through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1多路复用器。 非易失性存储晶体管耦合到多路复用器的n个输入端中的每一个。 如本领域已知的那样，多路复用器具有x地址输入，其中2 = n。 多路复用器的输出通过上拉晶体管耦合到V CC。 上拉晶体管的栅极耦合到具有耦合到多路复用器的地址输入的输入的地址转换检测器电路的输出。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US07495473B2

公开(公告)日：2009-02-24

申请号：US11858330

申请日：2007-09-20

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： G06F7/38 ,  H03K19/177

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to Vcc through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1复用器。 非易失性存储晶体管耦合到多路复用器的n个输入端中的每一个。 多路复用器具有x地址输入，其中2x = n，如本领域已知的。 多路复用器的输出通过上拉晶体管耦合到Vcc。 上拉晶体管的栅极耦合到具有耦合到多路复用器的地址输入的输入的地址转换检测器电路的输出。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US07443198B1

公开(公告)日：2008-10-28

申请号：US11929287

申请日：2007-10-30

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： G06F7/38 ,  H03K19/177

CPC分类号： H03K19/1778 ,  H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A one input non-volatile-memory-transistor based lookup table is coupled to each of the n data inputs of the multiplexer. The multiplexer has X inputs wherein n=2X as is known in the art. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1多路复用器。 一个输入非易失性存储器 - 晶体管的查找表被耦合到多路复用器的每个n个数据输入端。 多路复用器具有如本领域已知的具有n = 2×X的X个输入。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US07321237B2

公开(公告)日：2008-01-22

申请号：US11551973

申请日：2006-10-23

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to VCC through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1多路复用器。 非易失性存储晶体管耦合到多路复用器的n个输入端中的每一个。 如本领域已知的那样，多路复用器具有x地址输入，其中2 = n。 多路复用器的输出通过上拉晶体管耦合到V CC。 上拉晶体管的栅极耦合到具有耦合到多路复用器的地址输入的输入的地址转换检测器电路的输出。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US07492182B2

公开(公告)日：2009-02-17

申请号：US11858322

申请日：2007-09-20

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to VCC through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

公开(公告)号：US20080007293A1

公开(公告)日：2008-01-10

申请号：US11858341

申请日：2007-09-20

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： H03K19/177

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to VCC through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1多路复用器。 非易失性存储晶体管耦合到多路复用器的n个输入端中的每一个。 如本领域已知的那样，多路复用器具有x地址输入，其中2 = n。 多路复用器的输出通过上拉晶体管耦合到V CC。 上拉晶体管的栅极耦合到具有耦合到多路复用器的地址输入的输入的地址转换检测器电路的输出。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US20080007291A1

公开(公告)日：2008-01-10

申请号：US11858322

申请日：2007-09-20

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： H03K19/173

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to Vcc through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.