System for selecting between internal and external DMA request where ASP
generates internal request is determined by at least one bit position
within configuration register
    1.
    发明授权
    System for selecting between internal and external DMA request where ASP generates internal request is determined by at least one bit position within configuration register 失效
    用于在ASP生成内部请求的内部和外部DMA请求之间进行选择的系统由配置寄存器中的至少一个位位置决定

    公开(公告)号:US5896549A

    公开(公告)日:1999-04-20

    申请号:US807103

    申请日:1997-02-04

    IPC分类号: G06F13/28 G06F3/00

    CPC分类号: G06F13/28

    摘要: A microcontroller is presented which is configurable to transfer data to and from one or more asynchronous serial ports (ASPs) using direct memory access (DMA). The microcontroller includes an execution unit, a DMA unit, one or more ASPs, and at least one input/output (I/O) pad formed upon a single monolithic semiconductor substrate. The execution unit is configured to execute instructions, preferably .times.86 instructions. Each ASP is configurable to generate an internal DMA request signal, which effectuates a DMA transfer of serial communication data, and multiple DMA control signals. Each I/O pad is adapted to receive an external DMA request signal generated by a device external to the microcontroller. The DMA unit includes selection logic coupled to one or more DMA channel circuits. The selection logic receives the internal and external DMA request signals as well as the DMA control signals, and produces a DMA request signal for each DMA channel circuit. Each DMA request signal is either an internal DMA request signal or an external DMA request signal, depending upon the DMA control signals. Each DMA channel circuit receives the corresponding DMA request signal and performs a data transfer operation in response to the DMA request signal. During the DMA transfer operation, data is read from a first address and written to a second address. Each ASP and DMA channel circuit includes at least one configuration register, the contents of which determine the operation of the ASP or DMA channel circuit.

    摘要翻译: 提出了一种微控制器,其可配置为使用直接存储器访问(DMA)将数据传送到一个或多个异步串行端口(ASP)。 微控制器包括执行单元,DMA单元,一个或多个ASP以及形成在单个单片半导体衬底上的至少一个输入/输出(I / O)焊盘。 执行单元被配置为执行指令,优选地执行x86指令。 每个ASP可配置为产生内部DMA请求信号,从而实现串行通信数据的DMA传输和多个DMA控制信号。 每个I / O焊盘适于接收由微控制器外部的器件产生的外部DMA请求信号。 DMA单元包括耦合到一个或多个DMA通道电路的选择逻辑。 选择逻辑接收内部和外部DMA请求信号以及DMA控制信号,并为每个DMA通道电路产生DMA请求信号。 根据DMA控制信号,每个DMA请求信号是内部DMA请求信号或外部DMA请求信号。 每个DMA通道电路接收对应的DMA请求信号,并响应DMA请求信号执行数据传输操作。 在DMA传输操作期间,从第一地址读取数据并写入第二地址。 每个ASP和DMA通道电路包括至少一个配置寄存器,其内容决定了ASP或DMA通道电路的操作。

    Computer system with programmable bus size
    2.
    发明授权
    Computer system with programmable bus size 失效
    具有可编程总线大小的计算机系统

    公开(公告)号:US6047347A

    公开(公告)日:2000-04-04

    申请号:US816944

    申请日:1997-02-04

    IPC分类号: G06F9/318 G06F13/16 G06F9/22

    CPC分类号: G06F13/1678 G06F9/342

    摘要: A computer system is presented having a mechanism for re-configuring the size of a data bus which links memory and/or input/output devices, or which links those devices to an execution unit. The mechanism includes a microcontroller embodying an chip select unit and a bus interface unit. The chip select unit allows computer system initiation from an upper memory address space occupied by a ROM. Thereafter, middle and lower memory address spaces occupied by RAM can be accessed by either an 8-bit or a 16-bit data bus, that data bus being either separate from or multiplexed with an address bus. The size of RAM can be configured in accordance with the data bus size which accesses RAM. Input/output address space can also be adjusted depending upon the data bus size which accesses input/output peripherals. The microcontroller thereby includes chip select signals which select the various memory devices and the input/output device, and further includes a bus interface unit which programmably chooses either 8-bit or 16-bit accesses to those selected devices.

    摘要翻译: 提出了一种计算机系统,其具有用于重新配置连接存储器和/或输入/输出设备的数据总线的大小,或将这些设备链接到执行单元的机构。 该机构包括体现芯片选择单元和总线接口单元的微控制器。 芯片选择单元允许从ROM占用的上部存储器地址空间进行计算机系统启动。 此后,RAM占用的中低位存储器地址空间可以由8位或16位数据总线访问,该数据总线与地址总线分开或与地址总线复用。 可以根据访问RAM的数据总线大小来配置RAM的大小。 还可以根据访问输入/输出外设的数据总线大小来调整输入/输出地址空间。 因此,微控制器包括选择各种存储器件和输入/输出器件的芯片选择信号,并且还包括总线接口单元,可编程地选择对这些选择的器件的8位或16位访问。

    Web-based status/issue tracking system based on parameterized definition
    3.
    发明授权
    Web-based status/issue tracking system based on parameterized definition 有权
    基于参数化定义的基于Web的状态/问题跟踪系统

    公开(公告)号:US06370575B1

    公开(公告)日:2002-04-09

    申请号:US09227386

    申请日:1999-01-08

    IPC分类号: G06F1300

    摘要: A web-based tool is provided for unifying submission of reports and other communications between disciplines of an organization. The tool provides weekly reports, submissions by discipline and issue, and automatic report creation, with email notification to management team members. A flexible scheme allows deployment on multiple projects without significant changes in software, because of its parameterized design.

    摘要翻译: 提供了一个基于网络的工具,用于统一提交报告和组织的学科之间的其他沟通。 该工具提供每周报告,按纪律和问题提交的报告,以及自动创建报告,并向管理团队成员发送电子邮件通知。 灵活的方案允许部署在多个项目上,而不会因软件的参数设计而在软件上进行重大更改。