公开(公告)号：US08572539B2

公开(公告)日：2013-10-29

申请号：US12265585

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer ,  Luciano Lavagno

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer ,  Luciano Lavagno

IPC分类号： G06F17/50 ,  G06F9/455 ,  G06F3/00 ,  H03L7/00 ,  H03K17/00

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US20090115503A1

公开(公告)日：2009-05-07

申请号：US12265585

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer ,  Luciano Lavagno

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer ,  Luciano Lavagno

IPC分类号： G05F1/10

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US20090116597A1

公开(公告)日：2009-05-07

申请号：US12265620

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer ,  Luciano Lavagno

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer ,  Luciano Lavagno

IPC分类号： H04B1/00 ,  H04L7/00

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US07701255B2

公开(公告)日：2010-04-20

申请号：US12265571

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

IPC分类号： H03K19/00

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US20090119621A1

公开(公告)日：2009-05-07

申请号：US12265640

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

IPC分类号： G06F17/50

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US20090115488A1

公开(公告)日：2009-05-07

申请号：US12265608

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

IPC分类号： G06F17/50 ,  H03K17/00

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US20090119622A1

公开(公告)日：2009-05-07

申请号：US12265549

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

IPC分类号： G06F17/50

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US20090119631A1

公开(公告)日：2009-05-07

申请号：US12265657

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

IPC分类号： G06F17/50

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US20090115469A1

公开(公告)日：2009-05-07

申请号：US12265571

申请日：2008-11-05

申请人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

发明人： Jordi Cortadella ,  Vigyan Singhal ,  Emre Tuncer

IPC分类号： H03L7/00

CPC分类号： H03L7/00 ,  G06F17/505 ,  G06F2217/14 ,  H03K19/20

摘要： A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.

摘要翻译： 用于将给定的同步电路描述自动变换为等效且可证明的正确的非同步电路描述的系统。 包括在自动变换中的技术是使用两相协议合成可变性感知控制器的技术，使用门控时钟和可测试性电路合成可变性感知控制器的技术，用于合成针对性能优化的可变性感知控制器的技术 初始化合成控制器，用于动态最小化功率需求的技术，以及将失步电路与外部同步电路接口的技术。 还公开了用于实现用于在电子设计自动化设计流程的上下文中将同步电路描述自动变换为等同且可证明的正确的不同步电路描述的系统的技术。 提供了在上述技术的应用中使用的示例性电路。 介绍并解释了用于证明输入描述和所得到的非同步电路之间等价性的数学模型和技术的应用。

公开(公告)号：US07895552B1

公开(公告)日：2011-02-22

申请号：US11092994

申请日：2005-03-28

申请人： Vigyan Singhal ,  Soe Myint ,  Chung-Wah Norris Ip ,  Howard Wong-Toi

发明人： Vigyan Singhal ,  Soe Myint ,  Chung-Wah Norris Ip ,  Howard Wong-Toi

IPC分类号： G06F17/50

CPC分类号： G06F17/504

摘要： In the field of functional verification of digital designs in systems that use an abstraction for portions of a circuit design to perform the verification proof, a tool is described for resolving inconsistencies between the design and abstractions for the design. The tool provides information to a user about intermediate steps in the verification process. In response, the user may provide insight about the design to allow the tool to adjust the verification analysis of the design. The information provided to the user, including possible conflicts between the design and its abstractions, may include visualization techniques to facilitate the user's understating of any inconsistencies.

摘要翻译： 在使用电路设计部分的抽象来执行验证证明的系统中的数字设计的功能验证领域中，描述了用于解决设计和设计抽象之间不一致的工具。 该工具向用户提供有关验证过程中的中间步骤的信息。 作为响应，用户可以提供关于设计的洞察，以允许工具调整设计的验证分析。 提供给用户的信息，包括设计与其抽象之间可能的冲突，可能包括可视化技术，以便于用户低估任何不一致之处。