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公开(公告)号：US4876176A
公开(公告)日：1989-10-24
申请号：US40416
申请日：1987-04-20
IPC分类号： G03F7/00 , H01L21/70 , H01L21/8252 , H01L27/06
CPC分类号： G03F7/00 , H01L21/707 , H01L21/8252 , H01L27/0605
摘要： Method for fabrication of quasi-monolithic microwave integrated circuits in which metals, oxides, and processes are selected to enable fabrication of the circuits by first producing many layers of metals and oxides in situ without removing the circuit from its environmental chamber. This reduces inclusion of contaminating chemical films and particles between the desired layers. Circuit elements are then defined by processing of the layers by photolithography and other processes from the top of the circuit downward. Lumped and distributed capacitors, resistors, inductors, transmission lines, and contacts for active devices are monolithically defined, with a reduced number of process steps.
摘要翻译： 制备准单片微波集成电路的方法，其中金属，氧化物和工艺被选择以通过首先在原位生产许多金属和氧化物而不从其环境室中除去电路来制造电路。 这减少了污染化学膜和颗粒在所需层之间的包含。 然后通过光刻和电路顶部的其它处理向下处理层来限定电路元件。 用于有源器件的集中和分布式电容器，电阻器，电感器，传输线和触点是单片定义的，并且具有减少的工艺步骤数量。
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公开(公告)号：US4789645A
公开(公告)日：1988-12-06
申请号：US40418
申请日：1987-04-20
IPC分类号： H01L21/70 , H01L21/8252 , H01L29/48 , H01L21/283
CPC分类号： H01L21/707 , H01L21/8252 , Y10S148/014 , Y10S148/021 , Y10S438/913
摘要： During fabrication of monolithic microwave integrated circuits, active devices having sources, gates, drains, and/or Schottky barrier junctions are first provided for an epitaxial layers. Then many layers of metals and oxides are produced thereover in situ without removing the circuit from its environmental chamber. Circuit elements are then defined by processing of the many layers sequentially by photolithography and other processes from the top of the chip downward. Certain combinations of metals, oxides, and processes are selected to enable fabrication of circuits from the top down in this way. This reduces inclusion of contaminating chemical films and particles between the desired layers. Lumped and distributed capacitors, resistors, inductors, transmission lines, contacts, and complete active devices are monolithically defined, with a reduced number of process steps. An all-refractory MESFET is described, having a Schottky barrier gate and nonalloyed ohmic contacts for source and drain producible at room temperatures. Source, gate, and drain can be defined with a single mask. A thinner gold layer is formed for FET contacts than for other circuit conductors and elements by means of a configured tantalum layer buried in a thick gold layer.
摘要翻译： 在制造单片微波集成电路期间，首先提供具有源极，栅极，漏极和/或肖特基势垒结的有源器件用于外延层。 然后在原地生产许多层金属和氧化物，而不从其环境室中移除电路。 然后通过光刻和从芯片的顶部向下的其它处理顺序地处理许多层来定义电路元件。 选择金属，氧化物和工艺的某些组合以使得能够以这种方式从上到下制造电路。 这减少了污染化学膜和颗粒在所需层之间的包含。 集中和分布式电容器，电阻器，电感器，传输线，触点和完整的有源器件都是单片定义的，数量减少的工艺步骤。 描述了全难熔MESFET，其具有肖特基势垒栅极和用于在室温下可产生的源极和漏极的非合金欧姆接触。 源，栅极和漏极可以用单个掩模定义。 通过埋在厚金层中的配置的钽层，为FET触点形成更薄的金层，而不是其他电路导体和元件。
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