Method for preventing multi-level cache system deadlock in a
multi-processor system
    1.
    发明授权
    Method for preventing multi-level cache system deadlock in a multi-processor system 失效
    防止多处理器系统中多级缓存系统死锁的方法

    公开(公告)号:US5632025A

    公开(公告)日:1997-05-20

    申请号:US696788

    申请日:1996-08-14

    IPC分类号: G06F12/08 G06F12/14

    CPC分类号: G06F12/0811

    摘要: A method for preventing deadlock due to the need for data exclusivity when performing forced atomic instructions in a multi-level cache in a multi-processor system. The system determines whether an aligned multi-byte word in which the data of a forced atomic instruction, such as an integer store operation, is exclusive in a first level cache. If so, the forced atomic instruction is allowed to enter a second level cache pipeline. If not, the forced atomic instruction is prevented from entering the second level cache pipeline and a cache miss and fill operation is initiated to cause the aligned word to be exclusive in the first level cache.

    摘要翻译: 一种用于在多处理器系统中的多级缓存中执行强制原子指令时由于需要数据排他性而防止死锁的方法。 系统确定其中诸如整数存储操作的强制原子指令的数据在第一级高速缓存中是否排他的对齐的多字节字。 如果是这样,则强制原子指令被允许进入第二级高速缓存流水线。 如果不是,则强制原子指令被阻止进入第二级高速缓存流水线并且启动高速缓存未命中和填充操作以使对齐的字在第一级高速缓存中是排他的。