公开(公告)号：US20120140858A1

公开(公告)日：2012-06-07

申请号：US12961271

申请日：2010-12-06

申请人： June Chul ROH ,  Srinath HOSUR ,  Timothy M. SCHMIDL

发明人： June Chul ROH ,  Srinath HOSUR ,  Timothy M. SCHMIDL

IPC分类号： H04L27/06

CPC分类号： H04L27/205 ,  H04L27/2335

摘要： Systems and methods for fine symbol timing estimation are disclosed herein. In one embodiment, a wireless receiver includes a differential detector, a correlator, a coarse symbol timing estimator, and a fine symbol timing estimator. The differential detector is configured to detect phase differences in a received preamble signal modulated using differential phase shift keying. The correlator is configured to correlate symbol values output by the differential detector against a reference sequence. The coarse symbol timing estimator is configured to generate a coarse symbol timing estimate, and to generate a coarse timing sample symbol index value corresponding to the coarse symbol timing estimate. The fine symbol timing estimator is configured to generate a fine symbol timing estimate that is more accurate than the coarse symbol timing estimate based on the coarse timing sample symbol index value and correlation samples at index values preceding and succeeding the coarse timing sample index value.

摘要翻译： 本文公开了用于精细符号定时估计的系统和方法。 在一个实施例中，无线接收机包括差分检测器，相关器，粗略符号定时估计器和精细符号定时估计器。 差分检测器被配置为检测使用差分相移键控调制的接收前导信号中的相位差。 相关器被配置为将由差分检测器输出的符号值与参考序列相关联。 粗略符号定时估计器被配置为产生粗略符号定时估计，并且生成与粗略符号定时估计对应的粗定时采样符号索引值。 精细符号定时估计器被配置为基于粗略定时样本符号索引值和在粗略定时样本索引值之前和之后的索引值处的相关样本，生成比粗略符号定时估计更精确的精细符号定时估计。

公开(公告)号：US20100261429A1

公开(公告)日：2010-10-14

申请号：US12760510

申请日：2010-04-14

申请人： Anuj BATRA ,  Timothy M. SCHMIDL ,  Srinath HOSUR ,  June Chul ROH

发明人： Anuj BATRA ,  Timothy M. SCHMIDL ,  Srinath HOSUR ,  June Chul ROH

IPC分类号： H04B7/00

CPC分类号： H04W4/80 ,  H04L27/18 ,  H04L27/20 ,  H04L27/2675 ,  H04L69/22 ,  H04W52/36 ,  H04W52/367 ,  H04W72/0453 ,  H04W74/0816

摘要： In at least some embodiments, a communication device includes a transceiver with a physical (PHY) layer. The PHY layer is configured for body area network (BAN) operations in a limited multipath environment using M-ary PSK, differential M-ary PSK or rotated differential M-ary PSK. Also, the PHY layer uses a constant symbol rate for BAN packet transmissions.

摘要翻译： 在至少一些实施例中，通信设备包括具有物理（PHY）层的收发器。 PHY层被配置为使用M-ary PSK，差分M-ary PSK或旋转差分M-ary PSK的有限多径环境中的身体局域网（BAN）操作。 此外，PHY层对于BAN分组传输使用恒定的符号率。

公开(公告)号：US20100260236A1

公开(公告)日：2010-10-14

申请号：US12760513

申请日：2010-04-14

申请人： Anuj BATRA ,  Timothy M. SCHMIDL ,  Srinath HOSUR ,  June Chul ROH

发明人： Anuj BATRA ,  Timothy M. SCHMIDL ,  Srinath HOSUR ,  June Chul ROH

IPC分类号： H04B1/707 ,  H04L5/16

CPC分类号： H04W4/80 ,  H04L27/18 ,  H04L27/20 ,  H04L27/2675 ,  H04L69/22 ,  H04W52/36 ,  H04W52/367 ,  H04W72/0453 ,  H04W74/0816

摘要： In at least some embodiments, a communication device includes a transceiver with a physical (PHY) layer. The PHY layer is configured for body area network (BAN) operations in a limited multipath environment based on a constant symbol rate for BAN packet transmissions and based on M-ary PSK, differential M-ary PSK or rotated differential M-ary PSK modulation. The PHY layer is configured to construct a physical-layer service data unit (PSDU) based on a concatenate block, an insert shortened bits block, a Bose, Ray-Chaudhuri, Hocquenghem (BCH) encoder, a remove shortened bits block, an add pad bits block, a spreader, a bit interleaver, a scrambler, and a symbol mapper.

摘要翻译： 在至少一些实施例中，通信设备包括具有物理（PHY）层的收发器。 基于用于BAN分组传输的恒定符号速率并且基于M-ary PSK，差分M-ary PSK或旋转差分M-ary PSK调制，PHY层被配置用于在有限多径环境中的体区域网络（BAN）操作。 PHY层被配置为基于级联块，插入缩短的比特块，Bose，Ray-Chaudhuri，Hocquenghem（BCH）编码器，移除缩短的比特块，加法来构造物理层服务数据单元（PSDU） 填充比特块，扩展器，比特交织器，加扰器和符号映射器。

公开(公告)号：US20100260162A1

公开(公告)日：2010-10-14

申请号：US12760516

申请日：2010-04-14

申请人： Anuj BATRA ,  Timothy M. SCHMIDL ,  Srinath HOSUR ,  June Chul ROH

发明人： Anuj BATRA ,  Timothy M. SCHMIDL ,  Srinath HOSUR ,  June Chul ROH

IPC分类号： H04J1/00

CPC分类号： H04W4/80 ,  H04L27/18 ,  H04L27/20 ,  H04L27/2675 ,  H04L69/22 ,  H04W52/36 ,  H04W52/367 ,  H04W72/0453 ,  H04W74/0816

摘要： In at least some embodiments, a communication device includes a transceiver with a physical (PHY) layer. The PHY layer is configured for body area network (BAN) operations in a limited multipath environment based on a constant symbol rate for BAN packet transmissions and based on M-ary PSK, differential M-ary PSK or rotated differential M-ary PSK modulation. The PHY layer is configured to transmit and receive data in a frequency band selected from the group consisting of: 402-405 MHz, 420-450 MHz, 863-870 MHz, 902-928 MHz, 950-956 MHz, 2360-2400 MHz, and 2400-2483.5 MHz.

摘要翻译： 在至少一些实施例中，通信设备包括具有物理（PHY）层的收发器。 基于用于BAN分组传输的恒定符号速率并且基于M-ary PSK，差分M-ary PSK或旋转差分M-ary PSK调制，PHY层被配置用于在有限多径环境中的体区域网络（BAN）操作。 PHY层被配置为从选自以下的频带发送和接收数据：402-405MHz，420-450MHz，863-870MHz，902-928MHz，950-956MHz，2360-2400MHz ，和2400-2483.5MHz。

公开(公告)号：US20100202494A1

公开(公告)日：2010-08-12

申请号：US12702628

申请日：2010-02-09

申请人： June Chul ROH ,  Anuj BATRA ,  Sudipto CHAKRABORTY ,  Srinath HOSUR

发明人： June Chul ROH ,  Anuj BATRA ,  Sudipto CHAKRABORTY ,  Srinath HOSUR

IPC分类号： H04B1/00

CPC分类号： H04B1/69 ,  H04B1/7176 ,  H04B2001/6908

摘要： A symbol modulation system applicable to a body area network is disclosed herein. The symbol modulation system includes a symbol mapper. The symbol mapper is configured to determine a time within a predetermined symbol transmission interval at which a transmission representative of the symbol will occur. The time is determined based on a value of a symbol and a value of a time-hopping sequence. The time is selected from a plurality of symbol value based time slots, and a plurality of time-hopping sequence sub-time-slots within each symbol value based time slot. The symbol mapper is configured to generate a single guard interval within the symbol transmission interval. The single guard interval is positioned to terminate the symbol transmission interval.

摘要翻译： 本文公开了适用于体区网络的符号调制系统。 符号调制系统包括符号映射器。 符号映射器被配置为确定符号的传输代表将发生的预定符号传输间隔内的时间。 该时间基于符号的值和跳时序列的值来确定。 该时间是从基于多个符号值的时隙中选出的，以及在每个基于符号值的时隙内的多个跳时序列子时隙。 符号映射器被配置为在符号传输间隔内产生单个保护间隔。 单个保护间隔定位成终止符号传输间隔。

公开(公告)号：US20110255453A1

公开(公告)日：2011-10-20

申请号：US13087848

申请日：2011-04-15

申请人： June Chul ROH ,  Anuj BATRA ,  Srinath HOSUR

发明人： June Chul ROH ,  Anuj BATRA ,  Srinath HOSUR

IPC分类号： H04B1/69 ,  H04B7/00

CPC分类号： H04B1/7176 ,  H04B2001/6908

摘要： A system and method for scrambling and time-hopping in an ultra-wideband wireless network. In one embodiment, a wireless device includes a symbol mapper and a dynamic chip scrambler. The dynamic chip scrambler is configured to scramble each of a plurality of consecutive bursts of a time-hopped packet according to a pseudo-random scrambling sequence that varies from burst to burst.

摘要翻译： 一种用于在超宽带无线网络中进行加扰和跳时的系统和方法。 在一个实施例中，无线设备包括符号映射器和动态芯片加扰器。 动态码片扰频器被配置为根据从突发到突发不同的伪随机扰频序列来对每个跳时间分组的连续脉冲串进行加扰。

公开(公告)号：US20120054584A1

公开(公告)日：2012-03-01

申请号：US13220310

申请日：2011-08-29

申请人： June Chul ROH ,  Anuj BATRA ,  Srinath HOSUR

发明人： June Chul ROH ,  Anuj BATRA ,  Srinath HOSUR

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： H04L69/22 ,  H03M13/152 ,  H03M13/155 ,  H04L1/0057 ,  H04L1/0079 ,  H04L1/1812 ,  H04L43/0823

摘要： Apparatus and method for processing a physical layer protocol convergence (PLCP) header. In one embodiment, a wireless device includes a PLCP header processor. The PLCP header processor is configured to: process a physical layer header, process a check value based on the physical layer header, and process an error correction code based on the physical layer header and the check value. A concatenation of the physical layer header, check value, and error correction code the PLCP header processor is configured to process consists of a number of information bits that is an integer multiple of a number of information bits per symbol used to encode the PLCP header.

摘要翻译： 用于处理物理层协议收敛（PLCP）报头的装置和方法。 在一个实施例中，无线设备包括PLCP头处理器。 PLCP头处理器被配置为：处理物理层报头，基于物理层报头处理检查值，并且基于物理层报头和检查值处理纠错码。 配置为处理的PLCP头处理器的物理层报头，检查值和纠错码的级联由多个信息位组成，每个信息位是用于编码PLCP报头的每个符号的信息位数的整数倍。

公开(公告)号：US20110069707A1

公开(公告)日：2011-03-24

申请号：US12881924

申请日：2010-09-14

申请人： June Chul ROH ,  Anuj BATRA ,  Srinath HOSUR

发明人： June Chul ROH ,  Anuj BATRA ,  Srinath HOSUR

IPC分类号： H04L12/56

CPC分类号： H04L27/227 ,  H04L7/042 ,  H04L7/10 ,  H04L27/2071 ,  H04L27/2078 ,  H04L2027/0038 ,  H04L2027/0095

摘要： A packet detection and coarse symbol timing recovery system for preamble signal modulated with rotated differential M-ary phase shift key (PSK) modulation includes a differential detection unit, to provide a symbol signal responsive to a received signal. A preamble sequence correlator performs a preamble sequence correlation on the symbol signal to produce a correlator signal. A metric calculation unit performs a metric calculation on the correlator signal to produce a metric. A packet detection unit determines that a packet is detected and produces a sample index. A coarse symbol timing unit finds a peak of the calculated metric signal outputs a sample index for the peak as coarse symbol timing information. The sample indexes are used in processing a physical layer convergence procedure (PLCP) header and physical layer service data unit (PSDU) block.

摘要翻译： 用于利用旋转的差分M相移键（PSK）调制调制的前同步信号的分组检测和粗略符号定时恢复系统包括差分检测单元，以响应于接收到的信号提供符号信号。 前序序列相关器在符号信号上执行前同步码序列相关，以产生相关器信号。 度量计算单元对相关器信号执行度量计算以产生度量。 分组检测单元确定检测到分组并产生样本索引。 粗略符号定时单元发现所计算的度量信号的峰值将峰值的采样索引作为粗略符号定时信息输出。 样本索引用于处理物理层收敛过程（PLCP）头和物理层服务数据单元（PSDU）块。

公开(公告)号：US20120106611A1

公开(公告)日：2012-05-03

申请号：US13284716

申请日：2011-10-28

申请人： Taejoon KIM ,  Timothy M. SCHMIDL ,  Srinath HOSUR

发明人： Taejoon KIM ,  Timothy M. SCHMIDL ,  Srinath HOSUR

IPC分类号： H03D3/18 ,  H04B3/46 ,  H03D1/24 ,  H04L27/06

CPC分类号： H04L27/2657

摘要： A phase-locking loop (PLL) for use with orthogonal frequency division multiplexed signals. In one embodiment, a wireless receiver includes a PLL is configured to reduce phase and frequency divergence between the wireless receiver and a transmitter of a packet received by the wireless receiver. The PLL includes a loop bandwidth controller. The loop bandwidth controller is configured to set a bandwidth of the PLL to a first value for reception of an initial symbol of the packet. The loop bandwidth controller is configured to reduce the bandwidth of the PLL over a number of symbols preceding an initial header of the packet.

摘要翻译： 一种用于正交频分复用信号的锁相环（PLL）。 在一个实施例中，无线接收机包括PLL被配置为减少无线接收机与由无线接收机接收的分组的发射机之间的相位和频率发散。 PLL包括一个环路带宽控制器。 环路带宽控制器被配置为将PLL的带宽设置为用于接收分组的初始符号的第一值。 环路带宽控制器被配置为在分组的初始报头之前的多个符号上减少PLL的带宽。

公开(公告)号：US20110051845A1

公开(公告)日：2011-03-03

申请号：US12873114

申请日：2010-08-31

申请人： Timothy M. SCHMIDL ,  Anuj BATRA ,  Srinath HOSUR

发明人： Timothy M. SCHMIDL ,  Anuj BATRA ,  Srinath HOSUR

IPC分类号： H04B7/02 ,  H04L27/00

CPC分类号： H04L27/2626 ,  H04B7/12 ,  H04L1/0071 ,  H04L1/08 ,  H04L27/2602 ,  H04L27/2621

摘要： An integrated circuit includes logic configured to encode one or more first data symbols in one or more first sub-carriers as one or more second data symbols in one or more second sub-carriers of a smart-utility-network communication.

摘要翻译： 集成电路包括被配置为将一个或多个第一子载波中的一个或多个第一数据符号编码为智能公用网络通信的一个或多个第二子载波中的一个或多个第二数据符号的逻辑。