-
公开(公告)号：US20110037665A1
公开(公告)日：2011-02-17
申请号：US12852568
申请日：2010-08-09
申请人： Jung-Ho AHN , Seung-Hwan KIM , Austin KIM , Dong-Hwan KIM , Jae-Ho LEE , Sung-Min HER
发明人： Jung-Ho AHN , Seung-Hwan KIM , Austin KIM , Dong-Hwan KIM , Jae-Ho LEE , Sung-Min HER
摘要： A multiband built-in antenna of a portable terminal is provided. The multiband built-in antenna includes a main board having a ground area and a non-ground area on a front surface and an opposite surface, and an antenna radiator having a specific pattern directly formed on the non-ground area of the main board, wherein the antenna radiator comprises a first antenna radiator of which one end is branched off into two parts on the front surface of the main board so that one part is used for feeding and the other part is electrically connected to the ground area, and of which the other end is extended by a specific length in a widthwise direction of the terminal, and a second antenna radiator which protrudes towards the opposite surface of the main board from the other end of the first antenna radiator and is formed in a specific pattern in the non-ground area on the opposite surface of the main board.
摘要翻译： 提供便携式终端的多频带内置天线。 多频带内置天线包括：主面板，其表面和相对面具有接地面积和非接地面积;以及天线辐射体，其特征图案直接形成在主板的非接地区域上， 其中所述天线辐射器包括第一天线辐射器，其一端在所述主板的前表面上分支成两部分，使得一个部分用于馈送，并且另一部分电连接到所述接地区域，并且其中 另一端在端子的宽度方向上延伸特定的长度，第二天线辐射体从第一天线辐射体的另一端向主体板的相对表面突出，并且形成在 主板相对表面的非接地区域。
-
公开(公告)号：US20160203044A1
公开(公告)日：2016-07-14
申请号：US14713140
申请日：2015-05-15
申请人： Sang-Hyuk KWON , Young-Hoon SON , Jung-Ho AHN
发明人： Sang-Hyuk KWON , Young-Hoon SON , Jung-Ho AHN
CPC分类号： G11C29/76 , G06F11/0766 , G06F11/1016 , G06F11/2094 , G06F12/0246 , G06F12/0802 , G06F17/3033 , G06F2212/1032 , G09C1/00 , G11C2029/4402 , H04L9/0643 , H04L2209/12
摘要： A memory device may include a memory cell array, a bloom-filter circuit, a cache memory circuit, and a selecting circuit. The bloom-filter circuit may be configured to output a determination result signal that indicates that there is a possibility that a received address is one of failed addresses corresponding to failed cells of the memory cell array. The cache memory circuit may be configured to, store the failed addresses and a first set of data corresponding to the respective failed addresses, and configured to, when the determination result signal indicates a possibility, provide a comparison result signal by determining whether received address coincides with one of the failed addresses. The selecting circuit may be configured to output either first data of the first set of data or second data of the memory cell array corresponding to the received address based on determination result signal and comparison result signal.
摘要翻译： 存储器件可以包括存储单元阵列，开关滤波器电路，高速缓冲存储器电路和选择电路。 布鲁斯滤波电路可以被配置为输出指示接收到的地址是与存储器单元阵列的故障单元相对应的失败地址之一的可能性的确定结果信号。 高速缓冲存储器电路可以被配置为存储失败的地址和对应于各个故障地址的第一组数据，并且被配置为当确定结果信号指示可能时，通过确定接收到的地址是否一致来提供比较结果信号 其中一个失败的地址。 选择电路可以被配置为基于确定结果信号和比较结果信号输出与接收到的地址相对应的第一组数据或第二数据的第一数据或存储单元阵列的第二数据。
-
搜索结果
2 条记录 (耗时 0.027 秒)