公开(公告)号：US20090068809A1

公开(公告)日：2009-03-12

申请号：US12267785

申请日：2008-11-10

申请人： Jung-woo SEO ,  Jong-seo HONG ,  Tae-hyuk AHN ,  Jeong-sic JEON ,  Jun-sik HONG ,  Young-sun CHO

发明人： Jung-woo SEO ,  Jong-seo HONG ,  Tae-hyuk AHN ,  Jeong-sic JEON ,  Jun-sik HONG ,  Young-sun CHO

IPC分类号： H01L21/768 ,  H01L21/336

CPC分类号： H01L21/76895 ,  H01L21/76837 ,  H01L21/76885 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/10894

摘要： A semiconductor memory device includes a semiconductor substrate in which a cell region and a core and peripheral region are defined. The device further comprises isolation layers formed in the semiconductor substrate to define active regions, a first gate electrode structure formed in the cell region and a second gate electrode structure formed in the core and peripheral region. Source and drain regions formed in the active regions on respective sides of each of the gate electrode structures and self-aligned contact pads are formed in the cell region in contact with the source and drain regions. An insulating interlayer is formed on the semiconductor substrate between the self-aligned contact pads, and etch stoppers are formed on the insulating interlayer between the self-aligned contact pads in the cell region.

摘要翻译： 半导体存储器件包括其中限定了单元区域和芯和外围区域的半导体衬底。 该器件还包括形成在半导体衬底中以限定有源区的隔离层，形成在单元区域中的第一栅电极结构和形成在芯和外围区中的第二栅电极结构。 形成在每个栅电极结构和自对准接触焊盘的相应侧上的有源区中的源区和漏区形成在与源区和漏区接触的单元区域中。 在自对准接触焊盘之间的半导体衬底上形成绝缘中间层，并且在电池区域中的自对准接触焊盘之间的绝缘中间层上形成蚀刻阻挡层。

公开(公告)号：US20080064206A1

公开(公告)日：2008-03-13

申请号：US11935168

申请日：2007-11-05

申请人： Jung-woo SEO ,  Tae-hyuk AHN ,  Jeong-sic JEON

发明人： Jung-woo SEO ,  Tae-hyuk AHN ,  Jeong-sic JEON

IPC分类号： H01L21/4763

CPC分类号： H01L21/76895 ,  H01L21/76802 ,  H01L21/76831 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888

摘要： Manufacturing a semiconductor memory by first forming a first insulating layer covering a conductive pad. Next forming and pattering a bit line conductive layer and a second insulating layer to expose a part of the first insulating layer. A third insulating layer covering the exposed surfaces of the first insulating layer is formed. Exposing an upper surface of the bit line conductive layer pattern and an upper surface of the third insulating layer. Removing part of the third insulating layer and first insulating layer to expose the conductive pad. Forming a spacer on the side walls of the bit line conductive layer pattern and the first insulating layer. An insulating layer pattern and a second spacer layer are respectively formed on the bit line conductive layer pattern and on a side wall of the first spacer and a conductive plug, which is in contact with the conductive pad is formed.

摘要翻译： 通过首先形成覆盖导电垫的第一绝缘层来制造半导体存储器。 接下来形成和图案位线导电层和第二绝缘层以暴露第一绝缘层的一部分。 形成覆盖第一绝缘层的暴露表面的第三绝缘层。 露出位线导电层图案的上表面和第三绝缘层的上表面。 去除第三绝缘层和第一绝缘层的一部分以暴露导电焊盘。 在位线导电层图案和第一绝缘层的侧壁上形成间隔物。 分别在位线导电层图案和第一间隔物的侧壁上形成绝缘层图案和第二间隔层，并且形成与导电焊盘接触的导电插塞。

公开(公告)号：US20090102017A1

公开(公告)日：2009-04-23

申请号：US12247315

申请日：2008-10-08

申请人： Yong-kug BAE ,  Si-hyeung LEE ,  Tae-hyuk AHN ,  Seok-hwan OH

发明人： Yong-kug BAE ,  Si-hyeung LEE ,  Tae-hyuk AHN ,  Seok-hwan OH

IPC分类号： H01L27/108

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L28/91

摘要： A semiconductor device and a method of fabricating a semiconductor device provide high quality cylindrical capacitors. The semiconductor device includes a substrate defining a cell region and a peripheral circuit region, a plurality of capacitors in the cell region, and supports for supporting lower electrodes of the capacitors. The lower electrodes are disposed in a plurality of rows each extending in a first direction. A dielectric layer is disposed on the lower electrodes, and an upper electrode is disposed on the dielectric layer. The supports are in the form of stripes extending longitudinally in the first direction and spaced from each other along a second direction. Each of the supports engages the lower electrodes of a respective plurality of adjacent rows of the lower electrodes. Each one of the supports is also disposed at a different level in the device from the support that is adjacent thereto in the second direction.

摘要翻译： 半导体器件和制造半导体器件的方法提供高质量的圆柱形电容器。 半导体器件包括限定单元区域和外围电路区域的基板，单元区域中的多个电容器以及用于支撑电容器的下部电极的支撑。 下电极配置成沿着第一方向延伸的多列。 电介质层设置在下电极上，上电极设置在电介质层上。 支撑体是沿着第一方向纵向延伸并且沿着第二方向彼此间隔开的条纹的形式。 每个支撑件接合下电极的相应多个相邻行的下电极。 每个支撑件还设置在与第二方向相邻的支撑件处于装置中的不同水平处。