公开(公告)号：US20230156928A1

公开(公告)日：2023-05-18

申请号：US18157228

申请日：2023-01-20

Applicant: Juniper Networks, Inc.

Inventor： Steve WILKINSON ,  Daniel J. PREZIOSO

IPC: H05K3/42 ,  H05K3/22

CPC classification number: H05K3/425 ,  H05K3/22

Abstract: A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.