公开(公告)号：US4647517A

公开(公告)日：1987-03-03

申请号：US751842

申请日：1985-07-03

申请人： Jurgen Hersener ,  Hans-Joest Herzog ,  Karl Strohm

发明人： Jurgen Hersener ,  Hans-Joest Herzog ,  Karl Strohm

IPC分类号： G03F1/22 ,  H01L21/027 ,  H01L21/306 ,  G03F9/00

CPC分类号： G03F1/22 ,  H01L21/30608

摘要： The invention relates to a mask for X-ray lithography, in particular, for the manufacture of VLSI semiconductor components, which is economical and reliable in its manufacture. The mask should transfer absorber structures down to the submicron range. Lateral mechanical distortions are avoided by a tension-compensated carrier membrane of simultaneously B and Ge doped silicon. This carrier membrane is also optically more transparent than known Si membranes doped only with B, which facilitates optical alignment of the mask.

摘要翻译： 本发明涉及一种用于X射线光刻的掩模，特别是用于制造VLSI半导体元件，其在其制造中是经济可靠的。 掩模应将吸收体结构转移到亚微米范围内。 通过同时B和Ge掺杂硅的张力补偿载体膜避免横向机械扭曲。 该载体膜也比仅用B掺杂的已知Si膜更透明，这有利于掩模的光学对准。

公开(公告)号：US4843028A

公开(公告)日：1989-06-27

申请号：US282940

申请日：1988-12-08

申请人： Hans-Joest Herzog ,  Helmut Jorke ,  Horst Kibbel

发明人： Hans-Joest Herzog ,  Helmut Jorke ,  Horst Kibbel

IPC分类号： H01L29/812 ,  H01L21/20 ,  H01L21/203 ,  H01L21/26 ,  H01L21/338 ,  H01L29/15 ,  H01L29/80

CPC分类号： H01L29/155 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02576 ,  Y10S148/04 ,  Y10S148/058 ,  Y10S148/072 ,  Y10S148/132 ,  Y10S148/16 ,  Y10S438/918 ,  Y10S438/938

摘要： In a method for producing a spatially periodic semiconductor layer structure in the form of a superlattice composed of an alternating arrangement of strained semicondutor layers of at least two different semiconductor compositions forming at least one heterojunction, at least one of the semiconductor layers is provided with a doped layer which extends essentially parallel to the heterojunction and whose layer thickness is no greater than the thickness of the semiconductor layer in which it is produced.

摘要翻译： 在由形成至少一个异质结的由至少两种不同的半导体组合物的应变半导体层的交替排列组成的超晶格形式的空间周期性半导体层结构的制造方法中，至少一个半导体层设置有 掺杂层，其基本上平行于异质结延伸，并且其层厚度不大于其产生的半导体层的厚度。