公开(公告)号：US11251719B1

公开(公告)日：2022-02-15

申请号：US17132119

申请日：2020-12-23

申请人： KING ABDULAZIZ UNIVERSITY

发明人： M. Jagabar Sathik ,  Kaustubh Bhatnagar ,  Yam P. Siwakoti ,  Hussain M. Bassi ,  Muhyaddin Rawa ,  N. Sandeep

IPC分类号： H02M7/53 ,  H02M7/537 ,  H02M7/483

摘要： Switched capacitor multilevel inverter (SCMLI) configuration for high-frequency medium voltage applications is presented. A 5L-SCMLI basic configuration is further extended to 9L operation with a reduced number of active switches having self voltage boosting and balancing ability. Further, the proposed 9L-SCMLI is extended up to n level being considered as the basic configuration for the extension of horizontal extension (HE) and vertical extension (VE). A generalized switching table is provided for the proposed extensions. Design of the size of capacitor demonstrated for the proposed 9L-SCMLI.

公开(公告)号：US10396681B1

公开(公告)日：2019-08-27

申请号：US16122344

申请日：2018-09-05

申请人： King Abdulaziz University

发明人： Hussain M. Bassi ,  Muhyaddin J. Rawa

IPC分类号： H02M3/158 ,  H02M7/483 ,  H02M7/5387

摘要： A device, method, and non-transitory computer readable medium that determines a multilevel inverter circuitry comprising Nsource DC voltage sources and at least 2Nsource+5 controlled switching devices. The number of output voltage levels and the maximum output voltage of the multilevel inverter circuitry can be variable and depend on a trade-off among voltage rating of switches, variety of DC sources, and control strategy. A hybrid modulation scheme is employed to reduce the total harmonic distortions.