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公开(公告)号：US11437920B2
公开(公告)日：2022-09-06
申请号：US16952604
申请日：2020-11-19
发明人： Marcel Stark
IPC分类号： H02M5/42 , H02P3/22 , H02P29/68 , B60L7/02 , H02M5/458 , H02M7/53 , H02M1/08 , H02P27/06 , H02H6/00 , H02M1/32 , H02H5/04
摘要： A system includes a braking resistor and a controllable switch connected in series, the controllable switch adapted to connect to a terminal on a direct-voltage side of an AC/DC converter; an evaluation unit adapted to generate a control signal to control the controllable switch and including a determination device adapted to determine electric power supplied to the braking resistor; a voltage-acquisition device adapted to supply an output signal to the evaluation unit; and a controller adapted to regulate a set value toward an output signal of the determination device, the controller adapted to supply, directly and/or via a limiter, to a parameterizable filter adapted to convey an output signal to a switching element, the switching element adapted to generate an output signal to open and/or close the controllable switch as a function of exceeding and/or undershooting of a threshold value.
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公开(公告)号：US10511187B2
公开(公告)日：2019-12-17
申请号：US16197139
申请日：2018-11-20
摘要： A sequential extraction control device for use in a 3-phase DC/AC converter. The 3-phase converter has three single-phase DC/AC converters, each controlled by a respective PWM extractor. Duty factor adjustments are made depending on a current portion of an AC power cycle. A sequential regulator causes the PWM extractors to have non-overlapping duty cycles such that extractions of each of the single-phase DC/AC converters is performed in sequence, rather than concurrently. This improves the efficiency in extracting power from the DC power.
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公开(公告)号：US10050558B2
公开(公告)日：2018-08-14
申请号：US15180157
申请日：2016-06-13
发明人： Takabumi Ito , Sadanori Suzuki
摘要： An alternating current (AC) inverter includes a converter circuit configured to convert a direct current (DC) voltage to an AC voltage, and output terminals, the converter circuit being configured to output the AC voltage to the output terminals. The AC inverter further includes a signal terminal configured to receive a signal from outside of the AC inverter, and a control circuit configured to detect an abnormality related to the AC inverter, control the converter circuit to stop conversion of the DC voltage to the AC voltage in response to detection of the abnormality, and control the converter circuit to resume conversion of DC voltage to the AC voltage in response to reception of the signal on the signal terminal.
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公开(公告)号：US10020757B2
公开(公告)日：2018-07-10
申请号：US15383664
申请日：2016-12-19
CPC分类号： H02M7/539 , H02J3/32 , H02J3/383 , H02J7/35 , H02M1/32 , H02M1/36 , H02M7/48 , H02M7/53 , Y02E10/56 , Y02E10/563 , Y02E10/566 , Y02E70/30
摘要： A method for controlling an inverter including, when it is detected that a voltage across a bus capacitor, for example, a bus voltage, is excessively large, controlling a photo-voltaic (PV) battery to short-circuit so that the bus voltage drops. When the bus voltage drops to a particular value, continuing charging, by the PV battery, the bus capacitor to control the bus voltage to rise so that the bus voltage is kept within an operating voltage range of the inverter and the inverter can be equipped with a PV battery having a higher open circuit voltage. Therefore, a charging rate of the bus capacitor can be increased and a startup speed of the inverter can be increased.
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公开(公告)号：US20140286067A1
公开(公告)日：2014-09-25
申请号：US14198034
申请日：2014-03-05
申请人： Hitachi, Ltd.
发明人： Masami OHNISHI , Takeshi TOKUYAMA
CPC分类号： H02M7/53 , H01L24/36 , H01L24/40 , H01L2224/40245 , H01L2224/84801 , H01L2924/00014 , H01L2924/12032 , H01L2924/13055 , H01L2924/13091 , H02M1/34 , H02M7/003 , H01L2924/00 , H01L2224/37099
摘要： An inverter device includes; a switching element; a plurality of flyback diodes each connected in parallel with the switching element; a first conductor plate connected to anode terminals of the flyback diodes and to one side of the switching element; and a second conductor plate connected to cathode terminals of the flyback diodes and to the other side of the switching element. Each of the flyback diodes is formed in a polygonal shape, and the two flyback diodes in each pair of the flyback diodes that are arranged in mutually adjacent positions are arranged so that a vertex of one opposes a vertex of the other.
摘要翻译： 逆变器装置包括： 开关元件; 多个反激二极管，各自与开关元件并联连接; 连接到回扫二极管的阳极端子和开关元件的一侧的第一导体板; 以及连接到回扫二极管的阴极端子和开关元件的另一侧的第二导体板。 每个回扫二极管形成为多边形，并且布置在相互相邻位置的每对反激式二极管中的两个反激二极管被布置成使得顶点与另一个的顶点相反。
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公开(公告)号：US08184458B2
公开(公告)日：2012-05-22
申请号：US12475446
申请日：2009-05-29
申请人： Alexander Isurin , Alexander Cook
发明人： Alexander Isurin , Alexander Cook
IPC分类号： H02M7/53
CPC分类号： H02M7/538 , H02M1/34 , H02M2001/342 , Y02B70/1491
摘要： A snubber circuit for a switching converter. A power source has a first rail and a second rail. A snubber transformer has a primary winding and a secondary winding, a first end of each of the primary and secondary windings being coupled together to form a transformer common point and a second end of the primary winding being connected to a half-bridge switching converter. A first capacitor is connected between the first rail and the transformer common point. A second capacitor is connected between the second rail and the transformer common point. A first diode is connected between the secondary winding and the first rail. A second diode is connected between the secondary winding and the second rail. The snubber circuit suppresses voltage transients and recovers energy from said voltage transients. In one embodiment the switching converter is a half-bridge configuration with zero current switching in a multi-level topology.
摘要翻译： 用于开关转换器的缓冲电路。 电源具有第一导轨和第二导轨。 缓冲变压器具有初级绕组和次级绕组，每个初级和次级绕组的第一端被耦合在一起以形成变压器公共点，并且初级绕组的第二端连接到半桥开关转换器。 第一电容器连接在第一导轨和变压器公共点之间。 第二电容器连接在第二导轨和变压器公共点之间。 第二二极管连接在次级绕组和第一导轨之间。 第二二极管连接在次级绕组和第二导轨之间。 缓冲电路抑制电压瞬变，并从所述电压瞬变恢复能量。 在一个实施例中，开关转换器是在多电平拓扑中具有零电流切换的半桥配置。
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公开(公告)号：US5625566A
公开(公告)日：1997-04-29
申请号：US382346
申请日：1995-02-01
申请人： Mojy C. Chian
发明人： Mojy C. Chian
摘要： An auto-biasing virtual circuit mechanism for a bipolar transistor is independent of the biasing and the configuration of a signal waveform application circuit in which the transistor is installed. The virtual circuit comprises a plurality of AC signal coupling elements (capacitors) coupled in circuit between respective ones of a plurality of AC signal access terminals and respective ones of the base, collector and emitter electrodes of the transistor. Because of their frequency dependent impedance characteristics, each coupling capacitor effectively provides a short circuit coupling path for AC signals, while blocking or being an open circuit for DC bias inputs. Conversely, DC biasing is effected through large valued inductors, which provide short circuit coupling paths for DC bias inputs, while blocking or being open circuits for AC signal conditions. A controllable DC voltage bias source, which is coupled through an inductor to the emitter electrode of the transistor generates an output voltage corresponding to the difference between the collector voltage (Vc) and the required collector-emitter bias voltage (Vce) of the transistor, so that the effective differential voltage applied across the collector and emitter electrodes of the transistor is the desired value of Vce. The output terminal of a controllable collector current (Ic) current source is coupled directly to the collector electrode of the transistor.
摘要翻译： 用于双极晶体管的自动偏置虚拟电路机构与安装晶体管的信号波形施加电路的偏置和配置无关。 虚拟电路包括耦合在电路中的多个AC信号耦合元件（电容器），其在多个AC信号访问端子中的相应的AC晶体管的基极，集电极和发射极之间。 由于它们的频率依赖阻抗特性，每个耦合电容器有效地为交流信号提供短路耦合路径，同时阻塞或成为直流偏置输入的开路。 相反，直流偏置通过大值电感器实现，这些电感器为直流偏置输入提供短路耦合路径，同时阻塞或用于交流信号状态的开路。 通过电感器耦合到晶体管的发射极的可控直流电压偏置源产生对应于晶体管的集电极电压（Vc）和所需的集电极 - 发射极偏压（Vce）之间的差的输出电压， 使得施加在晶体管的集电极和发射极两端的有效差分电压是期望的Vce值。 可控集电极电流（Ic）电流源的输出端直接耦合到晶体管的集电极。
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公开(公告)号：US20220097547A1
公开(公告)日：2022-03-31
申请号：US17439776
申请日：2020-03-19
申请人： DCBEL INC.
IPC分类号： B60L53/62 , H02M7/217 , H02M7/53 , H02J3/38 , B60L53/20 , B60L53/30 , B60L53/51 , B60L53/52 , B60L53/53
摘要： An apparatus and method for managing power output of a converter has been provided by present disclosure having an electrical entry power sensor for measuring power drawn by an electrical entry of a household, a power drawn increase prediction module, a power budget controller managing power allocation to restrict a current level output by the power converter so as to prevent power drawn by the electrical entry from exceeding a predefined limit should the greatest probable jump in power drawn occur, a user interface allowing a user to request changes to said current level output by the power converter to charge an electric vehicle, wherein the power budget controller makes suggestions to said user to adjust said power drawn and has the user confirm said changes in order to reallocate said allocation according to said user's adjustments.
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公开(公告)号：US20220069706A1
公开(公告)日：2022-03-03
申请号：US17400246
申请日：2021-08-12
申请人： Yoichi TAKANO , Chuhei TERADA
发明人： Yoichi TAKANO , Chuhei TERADA
摘要： Disclosed is a semiconductor integrated circuit for a regulator for forming a low current consumption type DC power supply device. The semiconductor integrated circuit includes an output transistor, a control circuit, an operation control transistor and a soft start circuit. The output transistor is connected between an output terminal and a voltage input terminal to which a DC voltage is input. The control circuit controls the output transistor according to a feedback voltage of an output. The operation control transistor controls an operation state of the control circuit. The soft start circuit gradually changes a voltage applied to a control terminal of the operation control transistor and delays activation of the control circuit at a time of applying a power supply voltage to the voltage input terminal.
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公开(公告)号：US11251719B1
公开(公告)日：2022-02-15
申请号：US17132119
申请日：2020-12-23
发明人： M. Jagabar Sathik , Kaustubh Bhatnagar , Yam P. Siwakoti , Hussain M. Bassi , Muhyaddin Rawa , N. Sandeep
摘要： Switched capacitor multilevel inverter (SCMLI) configuration for high-frequency medium voltage applications is presented. A 5L-SCMLI basic configuration is further extended to 9L operation with a reduced number of active switches having self voltage boosting and balancing ability. Further, the proposed 9L-SCMLI is extended up to n level being considered as the basic configuration for the extension of horizontal extension (HE) and vertical extension (VE). A generalized switching table is provided for the proposed extensions. Design of the size of capacitor demonstrated for the proposed 9L-SCMLI.
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