公开(公告)号：US11252817B1

公开(公告)日：2022-02-15

申请号：US17184504

申请日：2021-02-24

Applicant: KIOXIA CORPORATION

Inventor： Naoki Kimura ,  Hiroaki Komaki

IPC: H05K1/02 ,  H05K1/11

Abstract: A printed wiring board includes first, second, and third wiring layers, first and second insulating members, and first and second vias. The first wiring layer includes a recognition mark and a first wiring on a first surface. The second wiring layer includes a first pad and a second wiring. The third wiring layer includes a third wiring. The first via penetrates the first insulating member and electrically connects the recognition mark to the first pad. The second via penetrates the second insulating member and electrically connects the first pad to the third wiring. The first pad and the first and second vias are in a region within an outer perimeter of the recognition mark when viewed from a direction orthogonal to the first surface.

公开(公告)号：US11357106B2

公开(公告)日：2022-06-07

申请号：US17120980

申请日：2020-12-14

Applicant: Kioxia Corporation

Inventor： Hiroaki Komaki

IPC: H05K1/11

Abstract: According to one embodiment, in a memory system, a printed circuit board a first end portion and a second end portion. The second end portion is a portion arranged in an opposite side of the first end portion. Both of a semiconductor memory and a controller are disposed on the first surface. A edge connector is connectable to a host device and is disposed in the first end portion. Plural through-hole portions are disposed in the second end portion. Each of the plural through-hole portions penetrates from the first surface to the second surface. Each of the plural through-hole portions has an inner surface covered with an electrically-conductive film. Plural pad electrodes are disposed on the second surface in the second end portion. At least some of the plural through-hole portions are electrically connected to the controller. At least some of the plural pad electrodes are electrically connected to the controller.