公开(公告)号：US20210294504A1

公开(公告)日：2021-09-23

申请号：US17003840

申请日：2020-08-26

Applicant: KIOXIA CORPORATION

Inventor： Hiroya SHIRAKURA ,  Shinya TAKEDA

IPC: G06F3/06 ,  G11C16/04 ,  G11C16/30

Abstract: According to one or more embodiments, a memory system includes a signal terminal, a power line, a resistance element, a nonvolatile semiconductor memory, and a controller. The resistance element is provided between the signal terminal and the power line. The nonvolatile semiconductor memory is configured to transmit and receive a signal to and from a host device via the signal terminal. The controller is configured to determine whether to connect the signal terminal to the power line via the resistance element.

公开(公告)号：US20210294509A1

公开(公告)日：2021-09-23

申请号：US17010772

申请日：2020-09-02

Applicant: KIOXIA CORPORATION

Inventor： Tetsuya IWATA ,  Hiroya SHIRAKURA ,  Shinya TAKEDA

IPC: G06F3/06

Abstract: A memory system of an embodiment includes a non-volatile memory and a controller configured to control the accessing of the non-volatile memory according to commands from a host device. The controller is configured to set a mode transition time to a value according to a first command received from the host. The controller transitions from a first operating mode to a second operating mode, in which power supply is suspended to a predetermined circuit, when the time since the last command was received from the host device reaches the mode transition time. The controller maintains the second operating mode until another command is received from the host device.