公开(公告)号：US20240143531A1

公开(公告)日：2024-05-02

申请号：US18458249

申请日：2023-08-30

Applicant: Kioxia Corporation

Inventor： Koichi INOUE ,  Sachiyo MIYAMOTO ,  Minoru UCHIDA ,  Taro IWASHIRO ,  Kenji SAKAUE

IPC: G06F13/28

CPC classification number: G06F13/28 ,  G06F2213/28

Abstract: A memory system includes a nonvolatile memory and a memory controller including a bus, a cache memory, a direct memory access controller, a first search circuit, a second search circuit, and a transfer control circuit. The direct memory access controller transfers cache target data stored in the nonvolatile memory to the cache memory. The second search circuit searches the cache target data that is being transferred. The transfer control circuit assigns, in response to the second search circuit detecting a search hit, to the transfer control circuit and the second search circuit, a bus right which has been assigned at least to the cache memory for the transfer of the cache target data to the cache memory, and obtains, by using the assigned bus right, a search result from the second search circuit via the bus.

公开(公告)号：US20220391130A1

公开(公告)日：2022-12-08

申请号：US17589583

申请日：2022-01-31

Applicant: KIOXIA CORPORATION

Inventor： Sachiyo MIYAMOTO ,  Terufumi TAKASAKI ,  Kenji SAKAUE ,  Taro IWASHIRO

IPC: G06F3/06

Abstract: A memory system includes a nonvolatile memory, and a memory controller configured to control the nonvolatile memory. The nonvolatile memory stores a busy table. The memory controller loads the busy table and controls a chip enable signal for the nonvolatile memory based on the busy table.