公开(公告)号：US20130223173A1

公开(公告)日：2013-08-29

申请号：US13773954

申请日：2013-02-22

申请人： Kabushiki Kaisha Toshiba

发明人： Yusuke HIGASHI ,  Haruki TODA ,  Kenichi MUROOKA ,  Satoru TAKASE ,  Yuichiro MITANI ,  Shuichi TORIYAMA

IPC分类号： G11C7/00

CPC分类号： G11C7/00 ,  G11C7/04 ,  G11C11/1695 ,  G11C13/0002 ,  G11C13/0023 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C13/0097 ,  G11C16/22 ,  G11C2213/71 ,  G11C2213/72

摘要： According to one embodiment, a semiconductor memory device includes a memory cell array including blocks, each block being capable of executing a write, read, or erase operation independently of other blocks. A control portion is configured to execute the operation of a first block among the blocks in a first cycle, set a selection inhibited region within a range of a predetermined distance from the first block, until a temperature relaxation time for relaxing a temperature of the first block has elapsed, set a region except the selection inhibited region among the blocks as a second block, and execute the operation of the second block in a second cycle.

摘要翻译： 根据一个实施例，半导体存储器件包括包括块的存储单元阵列，每个块能够独立于其它块执行写入，读取或擦除操作。 控制部分被配置为在第一周期中执行块中的第一块的操作，将选择禁止区域设置在距离第一块的预定距离的范围内，直到用于放宽第一块的温度的温度弛豫时间 块已经过去，将除块中的选择禁止区域之外的区域设置为第二块，并且在第二周期中执行第二块的操作。