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公开(公告)号：US09412765B2
公开(公告)日：2016-08-09
申请号：US14171331
申请日：2014-02-03
发明人： Tomomasa Ueda , Shintaro Nakano , Nobuyoshi Saito , Kentaro Miura , Yujiro Hara , Hajime Yamaguchi
IPC分类号： H01L27/12 , H01L29/66 , H01L29/786 , H01L33/08 , H01L21/336
CPC分类号： H01L27/1225 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： According to one embodiment, a thin film transistor includes: a substrate; a semiconductor layer; first and second insulating films; and gate, source and drain electrodes. The semiconductor layer is provided on the substrate. The semiconductor layer is made of an oxide having indium. The semiconductor layer has first and second regions and other region. The first insulating film covers a top face of the other region. The second insulating film covers at least a pair of side surfaces of the semiconductor layer. The second insulating film is formed under a condition different from that for the first insulating film. The gate electrode is provided on the first and second insulating films or below the semiconductor layer. The source and drain electrodes are provided on the first and second regions, respectively. The drain and source electrodes sandwich the pair of the side surfaces of the semiconductor layer.
摘要翻译： 根据一个实施例，薄膜晶体管包括：衬底; 半导体层; 第一和第二绝缘膜; 和栅极，源极和漏极。 半导体层设置在基板上。 半导体层由具有铟的氧化物制成。 半导体层具有第一和第二区域和其它区域。 第一绝缘膜覆盖另一区域的顶面。 第二绝缘膜覆盖半导体层的至少一对侧表面。 在与第一绝缘膜不同的条件下形成第二绝缘膜。 栅电极设置在第一和第二绝缘膜上或半导体层下方。 源极和漏极分别设置在第一和第二区域上。 漏极和源电极夹着半导体层的一对侧表面。
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2.发明申请公开(公告)号：US20140147948A1
公开(公告)日：2014-05-29
申请号：US14171331
申请日：2014-02-03
发明人： Tomomasa Ueda , Shintaro Nakano , Nobuyoshi Saito , Kentaro Miura , Yujiro Hara , Hajime Yamaguchi
CPC分类号： H01L27/1225 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： According to one embodiment, a thin film transistor includes: a substrate; a semiconductor layer; first and second insulating films; and gate, source and drain electrodes. The semiconductor layer is provided on the substrate. The semiconductor layer is made of an oxide having indium. The semiconductor layer has first and second regions and other region. The first insulating film covers a top face of the other region. The second insulating film covers at least a pair of side surfaces of the semiconductor layer. The second insulating film is formed under a condition different from that for the first insulating film. The gate electrode is provided on the first and second insulating films or below the semiconductor layer. The source and drain electrodes are provided on the first and second regions, respectively. The drain and source electrodes sandwich the pair of the side surfaces of the semiconductor layer.
摘要翻译： 根据一个实施例，薄膜晶体管包括：衬底; 半导体层; 第一和第二绝缘膜; 和栅极，源极和漏极。 半导体层设置在基板上。 半导体层由具有铟的氧化物制成。 半导体层具有第一和第二区域和其它区域。 第一绝缘膜覆盖另一区域的顶面。 第二绝缘膜覆盖半导体层的至少一对侧表面。 在与第一绝缘膜不同的条件下形成第二绝缘膜。 栅电极设置在第一和第二绝缘膜上或半导体层下方。 源极和漏极分别设置在第一和第二区域上。 漏极和源电极夹着半导体层的一对侧表面。
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公开(公告)号：US20200091334A1
公开(公告)日：2020-03-19
申请号：US16278838
申请日：2019-02-19
发明人： Makoto Mizukami , Takuma Suzuki , Yujiro Hara
摘要： A semiconductor device according to an embodiment includes a silicon carbide layer having first and second planes; first and second trenches extending in a first direction; first and second gate electrodes; a first silicon carbide region of a first conductivity type; a plurality of second silicon carbide regions of a second conductivity type between the first silicon carbide region and the first plane, located between the first trench and the second trench, and separated from each other in the first direction; a fourth silicon carbide region of the second conductivity type between two of the second silicon carbide regions and contacting the second silicon carbide region; a fifth silicon carbide region of the second conductivity type between the two second silicon carbide regions and contacting the second silicon carbide region; a first electrode contacting the first silicon carbide region; and a second electrode.
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