公开(公告)号：US20130334603A1

公开(公告)日：2013-12-19

申请号：US13525650

申请日：2012-06-18

申请人： Kangguo CHENG ,  Bruce B. DORIS ,  Shom PONOTH ,  Stefan SCHMITZ ,  Raghavasimhan SREENIVASAN

发明人： Kangguo CHENG ,  Bruce B. DORIS ,  Shom PONOTH ,  Stefan SCHMITZ ,  Raghavasimhan SREENIVASAN

IPC分类号： H01L29/78 ,  H01L21/302

CPC分类号： H01L21/76283 ,  H01L21/76232 ,  H01L29/66772 ,  H01L29/78654

摘要： A method including etching a shallow trench laterally surrounding a portion of a semiconductor substrate, the semiconductor substrate comprising a semiconductor-on-insulator SOI layer, a pad oxide layer, and a pad nitride layer, depositing a first nitride liner, a dielectric liner, and a second nitride liner in the shallow trench, wherein the dielectric liner is located between the first and the second nitride liner, and filling the shallow trench with a shallow trench fill portion.

摘要翻译： 一种方法，包括蚀刻横向围绕半导体衬底的一部分的浅沟槽，所述半导体衬底包括绝缘体上半导体SOI层，衬垫氧化物层和衬垫氮化物层，沉积第一氮化物衬垫，介电衬垫， 以及浅沟槽中的第二氮化物衬垫，其中所述电介质衬垫位于所述第一和第二氮化物衬垫之间，并且用浅沟槽填充部分填充所述浅沟槽。