公开(公告)号：US20100203654A1

公开(公告)日：2010-08-12

申请号：US12762825

申请日：2010-04-19

申请人： Kangping Zhang ,  Fong-Long Lin

发明人： Kangping Zhang ,  Fong-Long Lin

IPC分类号： H01L21/66

CPC分类号： G01R31/2884

摘要： In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.

摘要翻译： 在本发明中，公开了一种无包装集成电路管芯的测试方法。 管芯具有多个第一输入/输出焊盘。 在管芯中的不是第一多个（以下称为“第二多个”）的所有管芯的输入/输出焊盘之间在管芯中制造串联电连接。 第二组具有开始输入和结束输出。 第二多个的开始输入连接到第一多个输入焊盘的一个选择的输入缓冲器的输出，并且第二多个的输出端的输出也连接到第一多个的一个选择的输出焊盘的输入。 通过所选择的输入焊盘和第一组的选定的输出焊盘来测试第二组输入/输出焊盘，而不需要在晶片分类期间接触电探针。 本发明还涉及一种如此制造的便于测试的集成电路管芯。

公开(公告)号：US20090273007A1

公开(公告)日：2009-11-05

申请号：US12113881

申请日：2008-05-01

申请人： Kangping Zhang ,  Fong-Long Lin

发明人： Kangping Zhang ,  Fong-Long Lin

IPC分类号： H01L27/10 ,  H01L21/66

CPC分类号： G01R31/2884

摘要： In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.

摘要翻译： 在本发明中，公开了一种无包装集成电路管芯的测试方法。 管芯具有多个第一输入/输出焊盘。 在管芯中的不是第一多个（以下称为“第二多个”）的所有管芯的输入/输出焊盘之间在管芯中制造串联电连接。 第二组具有开始输入和结束输出。 第二多个的开始输入连接到第一多个输入焊盘的一个选择的输入缓冲器的输出，并且第二多个的输出端的输出也连接到第一多个的一个选择的输出焊盘的输入。 通过所选择的输入焊盘和第一组的选定的输出焊盘来测试第二组输入/输出焊盘，而不需要在晶片分类期间接触电探针。 本发明还涉及一种如此制造的便于测试的集成电路管芯。

公开(公告)号：US07851273B2

公开(公告)日：2010-12-14

申请号：US12762825

申请日：2010-04-19

申请人： Kangping Zhang ,  Fong Long Lin

发明人： Kangping Zhang ,  Fong Long Lin

IPC分类号： H01L21/82 ,  H01L27/10

CPC分类号： G01R31/2884

摘要： In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.

公开(公告)号：US07728361B2

公开(公告)日：2010-06-01

申请号：US12113881

申请日：2008-05-01

申请人： Kangping Zhang ,  Fong-Long Lin

发明人： Kangping Zhang ,  Fong-Long Lin

IPC分类号： H01L27/10 ,  H01L21/82 ,  H01L23/48

CPC分类号： G01R31/2884

摘要： In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.

摘要翻译： 在本发明中，公开了一种无包装集成电路管芯的测试方法。 管芯具有多个第一输入/输出焊盘。 在管芯中的不是第一多个（以下称为“第二多个”）的所有管芯的输入/输出焊盘之间在管芯中制造串联电连接。 第二组具有开始输入和结束输出。 第二多个的开始输入连接到第一多个输入焊盘的一个选择的输入缓冲器的输出，并且第二多个的输出端的输出也连接到第一多个的一个选择的输出焊盘的输入。 通过所选择的输入焊盘和第一组的选定的输出焊盘来测试第二组输入/输出焊盘，而不需要在晶片分类期间接触电探针。 本发明还涉及一种如此制造的便于测试的集成电路管芯。