公开(公告)号：US20050052209A1

公开(公告)日：2005-03-10

申请号：US10743171

申请日：2003-12-22

申请人： Karl Jacobs ,  Robert Neidorff

发明人： Karl Jacobs ,  Robert Neidorff

IPC分类号： H03F1/30 ,  H03K5/12

CPC分类号： H03F1/305

摘要： Circuitry is provided for controlling the slew rate of a negative output supply. The slew rate control circuitry includes an NMOS FET, a feedback resistor connected across the drain and the gate of the NMOS FET, an input resistor connected to the gate of the NMOS FET, level shifting circuitry connected between a positive output supply voltage and the input resistor, and a bias current source connected to the gate of the NMOS FET. A negative input supply voltage is connected to the source of the NMOS FET, and the negative output supply voltage is provided across a load connected to the drain of the NMOS FET. As the positive supply voltage ramps up from 0 to +VS, the level shifter provides a voltage to the input resistor that ramps up from −VS to 0 volts. Further, the drain voltage of the NMOS FET ramps down from 0 to −VS, thereby providing a negative output supply voltage −VS with a slew rate that linearly tracks the slew rate of the master positive output supply.

摘要翻译： 提供电路用于控制负输出电源的转换速率。 转换速率控制电路包括NMOS FET，连接在NMOS FET的漏极和栅极之间的反馈电阻器，连接到NMOS FET的栅极的输入电阻器，连接在正输出电源电压和输入端之间的电平移位电路 电阻器和连接到NMOS FET的栅极的偏置电流源。 负极输入电源电压连接到NMOS FET的源极，负极输出电源电压提供在连接到NMOS FET漏极的负载上。 当正电源电压从0增加到+ VS时，电平移位器向输入电阻提供电压，该电压从-VS上升至0伏。 此外，NMOS FET的漏极电压从0降低到-VS，从而提供具有线性跟踪主正输出电源的转换速率的转换速率的负输出电源电压-VS。

公开(公告)号：US20070177322A1

公开(公告)日：2007-08-02

申请号：US11346104

申请日：2006-02-02

申请人： Karl Jacobs

发明人： Karl Jacobs

IPC分类号： H02H3/00

CPC分类号： H03F3/217 ,  H03F1/52 ,  H03F1/523 ,  H03F2200/462 ,  H03F2200/507 ,  H03K17/0822 ,  H03K17/687

摘要： A system and method for responding to a current overload condition in a power switch provides a class D topology that applies a current sink or current source to the gate of the power switch. The current sink or source decreases or increases current flowing through the power switch to regulate power switch output current in the event of an overload. A timer for current regulation can be provided to shut off the power switch if the overload condition persists. A set of differently rated switches can be used separately or together to provide a range of current regulation response, from a wide regulation range with a fast response, to a narrow regulation range with a slow response. The system provides a rapid response to an overload condition and output current regulation without disabling the power switch to overcome short term overloads.

摘要翻译： 用于响应电力开关中的电流过载条件的系统和方法提供了将电流电流源或电流源施加到电源开关的栅极的D类拓扑。 电流源或源减少或增加流过电源开关的电流，以在过载情况下调节功率开关输出电流。 如果过载条件持续，可以提供电流调节定时器来切断电源开关。 一组不同等级的开关可以单独使用或一起使用，以便从具有快速响应的广泛调节范围到慢速响应的窄调节范围提供一系列电流调节响应。 该系统能够快速响应过载条件并输出电流调节，而不会使电源开关无法克服短时过载。