公开(公告)号：US20080038856A1

公开(公告)日：2008-02-14

申请号：US11898951

申请日：2007-09-18

申请人： Katsunori NISHII ,  Kaoru INOUE ,  Toshinobu MATSUNO ,  Yoshito IKEDA ,  Hiroyuki MASATO

发明人： Katsunori NISHII ,  Kaoru INOUE ,  Toshinobu MATSUNO ,  Yoshito IKEDA ,  Hiroyuki MASATO

IPC分类号： H01L21/44 ,  H01L21/02 ,  H01L21/31 ,  H01L21/3205

CPC分类号： H01L29/66863 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7783

摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.

摘要翻译： 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。

公开(公告)号：US20050001234A1

公开(公告)日：2005-01-06

申请号：US10711134

申请日：2004-08-26

申请人： Kaoru INOUE ,  Katsunori NISHII ,  Hiroyuki MASATO

发明人： Kaoru INOUE ,  Katsunori NISHII ,  Hiroyuki MASATO

IPC分类号： H01L29/04 ,  H01L29/20 ,  H01L29/423 ,  H01L29/778 ,  H01L31/0328

CPC分类号： H01L29/7783 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/42316

摘要： A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.

摘要翻译： 半导体器件包括：衬底; 包括形成在衬底上的GaN的缓冲层，其中：缓冲层的表面是Ga原子的c个面; 在缓冲层上形成包括GaN或InGaN的沟道层，其中：沟道层的表面是Ga或In原子的c面; 包括形成在沟道层上的AlGaN的电子给体层，其中：电子给体层的表面是Al或Ga原子的c个面; 形成在电子供体层上的源电极和漏电极; 形成在源电极和漏电极之间的包含GaN或InGaAlN的覆盖层，其中：覆盖层的表面是Ga或In原子的c面，并且覆盖层的至少一部分与电子给体层接触; 以及形成为至少一部分与盖层接触的栅电极。