公开(公告)号：US20090060022A1

公开(公告)日：2009-03-05

申请号：US11896184

申请日：2007-08-30

申请人： Kaushal K. Dhar ,  Timothy R. Miller

发明人： Kaushal K. Dhar ,  Timothy R. Miller

IPC分类号： H03K5/159

CPC分类号： H04L25/03057 ,  H04L2025/0349 ,  H04L2025/03592

摘要： An equalizer is provided, comprising: a feedback combiner to combine an input signal and a feedback signal to produce a first signal; a delay line to delay the first signal to produce a second signal; a feed-forward combiner to combine the second signal and a feed-forward signal to produce an output signal; an interim decision circuit to extract a sign bit from the first signal; N feedback scaling elements to generate N scaled feedback signals; M feed-forward scaling elements to generate M scaled feed forward signals; a feedback circuit to pass the N scaled feedback signals through feedback delay elements and feedback summing elements to generate the feedback signal in response to the sign bit; and a feed forward circuit to pass the M scaled feed forward signals through feed-forward delay elements and feed-forward summing elements to generate the feed-forward signal in response to the sign bit.

摘要翻译： 提供均衡器，包括：反馈组合器，用于组合输入信号和反馈信号以产生第一信号; 延迟线，用于延迟所述第一信号以产生第二信号; 前馈组合器，用于组合第二信号和前馈信号以产生输出信号; 临时决定电路，用于从第一信号中提取符号位; N个反馈缩放元件以产生N个缩放的反馈信号; M前馈缩放元素以产生M个缩放的前馈信号; 反馈电路，用于通过反馈延迟元件和反馈求和元件传递N个缩放的反馈信号，以响应于符号位产生反馈信号; 以及前馈电路，用于通过前馈延迟元件和前馈求和元件传递M个定标前馈信号，以响应于符号位产生前馈信号。

公开(公告)号：US08036260B2

公开(公告)日：2011-10-11

申请号：US11896184

申请日：2007-08-30

申请人： Kaushal K. Dhar ,  Timothy R. Miller

发明人： Kaushal K. Dhar ,  Timothy R. Miller

IPC分类号： H03H7/30 ,  H03K5/159

CPC分类号： H04L25/03057 ,  H04L2025/0349 ,  H04L2025/03592

摘要： An equalizer is provided, including: a feedback combiner to combine an input signal and a feedback signal to produce a first signal; a delay line to delay the first signal to produce a second signal; a feed-forward combiner to combine the second signal and a feed-forward signal to produce an output signal; an interim decision circuit to extract a sign bit from the first signal; N feedback scaling elements to generate N scaled feedback signals; M feed-forward scaling elements to generate M scaled feed forward signals; a feedback circuit to pass the N scaled feedback signals through feedback delay elements and feedback summing elements to generate the feedback signal in response to the sign bit; and a feed forward circuit to pass the M scaled feed forward signals through feed-forward delay elements and feed-forward summing elements to generate the feed-forward signal in response to the sign bit.

摘要翻译： 提供均衡器，包括：反馈组合器，用于组合输入信号和反馈信号以产生第一信号; 延迟线，用于延迟所述第一信号以产生第二信号; 前馈组合器，用于组合第二信号和前馈信号以产生输出信号; 临时决定电路，用于从第一信号中提取符号位; N个反馈缩放元件以产生N个缩放的反馈信号; M前馈缩放元素以产生M个缩放的前馈信号; 反馈电路，用于通过反馈延迟元件和反馈求和元件传递N个缩放的反馈信号，以响应于符号位产生反馈信号; 以及前馈电路，用于通过前馈延迟元件和前馈求和元件传递M个定标前馈信号，以响应于符号位产生前馈信号。