公开(公告)号：US20080277696A1

公开(公告)日：2008-11-13

申请号：US12179320

申请日：2008-07-24

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

IPC分类号： H01L29/808

CPC分类号： H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/66893 ,  H01L29/808

摘要： A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties.

摘要翻译： 横向结型场效应晶体管包括布置在源/漏区域之间的第三半导体层中的第一栅电极层，具有在第二半导体层上延伸的下表面，并且掺杂有比第二半导体层更重的p型杂质 以及布置在源极/漏极区域之间的第五半导体层中的第二栅极电极层，具有在第四半导体层上延伸的下表面，具有与第一栅极电极层基本相同的p型杂质浓度，以及 具有与第一栅极电极层相同的电位。 因此，横向结型场效应晶体管具有可以在保持良好的击穿电压特性的同时降低导通电阻的结构。

公开(公告)号：US20090315082A1

公开(公告)日：2009-12-24

申请号：US12552212

申请日：2009-09-01

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

IPC分类号： H01L29/808

CPC分类号： H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/66893 ,  H01L29/808

摘要： A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties.

摘要翻译： 横向结型场效应晶体管包括布置在源极/漏极区之间的第三半导体层中的第一栅电极层，具有在第二半导体层上延伸的下表面，并且掺杂有比第二半导体层更重的p型杂质 以及布置在源极/漏极区域之间的第五半导体层中的第二栅极电极层，具有在第四半导体层上延伸的下表面，具有与第一栅极电极层基本相同的p型杂质浓度，以及 具有与第一栅极电极层相同的电位。 因此，横向结型场效应晶体管具有可以在保持良好的击穿电压特性的同时降低导通电阻的结构。

公开(公告)号：US20060202238A1

公开(公告)日：2006-09-14

申请号：US11402701

申请日：2006-04-11

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

IPC分类号： H01L31/112

CPC分类号： H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/66893 ,  H01L29/808

摘要： A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties.

公开(公告)号：US07671388B2

公开(公告)日：2010-03-02

申请号：US12552212

申请日：2009-09-01

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

IPC分类号： H01L29/78

CPC分类号： H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/66893 ,  H01L29/808

摘要： A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties.

公开(公告)号：US07420232B2

公开(公告)日：2008-09-02

申请号：US11402701

申请日：2006-04-11

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

IPC分类号： H01L29/80 ,  H01L31/112

CPC分类号： H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/66893 ,  H01L29/808

摘要： A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties.

摘要翻译： 横向结型场效应晶体管包括布置在源/漏区域之间的第三半导体层中的第一栅电极层，具有在第二半导体层上延伸的下表面，并且掺杂有比第二半导体层更重的p型杂质 以及布置在源极/漏极区域之间的第五半导体层中的第二栅极电极层，具有在第四半导体层上延伸的下表面，具有与第一栅极电极层基本相同的p型杂质浓度，以及 具有与第一栅极电极层相同的电位。 因此，横向结型场效应晶体管具有可以在保持良好的击穿电压特性的同时降低导通电阻的结构。

公开(公告)号：US07671387B2

公开(公告)日：2010-03-02

申请号：US12179320

申请日：2008-07-24

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

IPC分类号： H01L29/80

CPC分类号： H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/66893 ,  H01L29/808

摘要： A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties.

摘要翻译： 横向结型场效应晶体管包括布置在源/漏区域之间的第三半导体层中的第一栅电极层，具有在第二半导体层上延伸的下表面，并且掺杂有比第二半导体层更重的p型杂质 以及布置在源极/漏极区域之间的第五半导体层中的第二栅极电极层，具有在第四半导体层上延伸的下表面，具有与第一栅极电极层基本相同的p型杂质浓度，以及 具有与第一栅极电极层相同的电位。 因此，横向结型场效应晶体管具有可以在保持良好的击穿电压特性的同时降低导通电阻的结构。

公开(公告)号：US07049644B2

公开(公告)日：2006-05-23

申请号：US10496040

申请日：2002-12-02

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

IPC分类号： H01L29/80 ,  H01L31/112

CPC分类号： H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/66893 ,  H01L29/808

摘要： A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties.

摘要翻译： 横向结型场效应晶体管包括布置在源/漏区域之间的第三半导体层中的第一栅电极层，具有在第二半导体层上延伸的下表面，并且掺杂有比第二半导体层更重的p型杂质 以及布置在源极/漏极区域之间的第五半导体层中的第二栅极电极层，具有在第四半导体层上延伸的下表面，具有与第一栅极电极层基本相同的p型杂质浓度，以及 具有与第一栅极电极层相同的电位。 因此，横向结型场效应晶体管具有可以在保持良好的击穿电压特性的同时降低导通电阻的结构。

公开(公告)号：US20050093017A1

公开(公告)日：2005-05-05

申请号：US10496040

申请日：2002-12-02

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Kenichi Hirotsu ,  Satoshi Hatsukawa ,  Takashi Hoshino ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

IPC分类号： H01L21/337 ,  H01L29/808 ,  H01L29/51

CPC分类号： H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/66893 ,  H01L29/808

摘要： A lateral junction field effect transistor includes a first gate electrode layer (18A) arranged in a third semiconductor layer (13) between source/drain region layers (6, 8), having a lower surface extending on the second semiconductor layer (12), and doped with p-type impurities more heavily than the second semiconductor layer (12), and a second gate electrode layer (18B) arranged in a fifth semiconductor layer (15) between the source/drain region layers (6, 8), having a lower surface extending on a fourth semiconductor layer (14), having substantially the same concentration of p-type impurities as the first gate electrode layer (18A), and having the same potential as the first gate electrode layer (18A). Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties.

摘要翻译： 横向结型场效应晶体管包括布置在源极/漏极区域（6,8）之间的第三半导体层（13）中的第一栅极电极层（18A），其具有在第二半导体层（12）上延伸的下表面， 并且掺杂有比第二半导体层（12）更重的p型杂质;以及布置在源极/漏极区域（6,8）之间的第五半导体层（15）中的第二栅电极层（18B） 具有在第四半导体层（14）上延伸的下表面，其具有与第一栅极电极层（18A）大致相同的p型杂质浓度，并具有与第一栅电极层（18A）相同的电位 ）。 因此，横向结型场效应晶体管具有可以在保持良好的击穿电压特性的同时降低导通电阻的结构。

公开(公告)号：US20070278540A1

公开(公告)日：2007-12-06

申请号：US11770414

申请日：2007-06-28

申请人： Takashi Hoshino ,  Shin Harada ,  Kazuhiro Fujikawa ,  Satoshi Hatsukawa ,  Kenichi Hirotsu

发明人： Takashi Hoshino ,  Shin Harada ,  Kazuhiro Fujikawa ,  Satoshi Hatsukawa ,  Kenichi Hirotsu

IPC分类号： H01L29/80 ,  H01L21/337

CPC分类号： H01L29/66068 ,  H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/66446 ,  H01L29/66909 ,  H01L29/8083

摘要： A vertical JFET 1a according to the present invention has an n+ type drain semiconductor portion 2, an n-type drift semiconductor portion 3, a p+ type gate semiconductor portion 4, an n-type channel semiconductor portion 5, an n+ type source semiconductor portion 7, and a p+ type gate semiconductor portion 8. The n-type drift semiconductor portion 3 is placed on a principal surface of the n+ type drain semiconductor portion 2 and has first to fourth regions 3a to 3d extending in a direction intersecting with the principal surface. The p+ type gate semiconductor portion 4 is placed on the first to third regions 3a to 3c of the n-type drift semiconductor portion 3. The n-type channel semiconductor portion 5 is placed along the p+ type gate semiconductor portion 4 and is electrically connected to the fourth region 3d of the n-type drift semiconductor portion 3.

摘要翻译： 根据本发明的垂直JFET1a具有n +型漏极半导体部分2，n型漂移半导体部分3，p +型栅极半导体部分4 ，n型沟道半导体部分5，n + +型源极半导体部分7和ap + +型栅极半导体部分8。 n型漂移半导体部分3放置在n +型漏极半导体部分2的主表面上，并且具有沿与主表面相交的方向延伸的第一至第四区域3至3d 。 p型+ +型栅极半导体部分4放置在n型漂移半导体部分3的第一至第三区域3至3c上。 n型沟道半导体部分5沿着p + +型栅极半导体部分4放置，并与n型漂移半导体部分3的第四区域3d电连接。

公开(公告)号：US07750377B2

公开(公告)日：2010-07-06

申请号：US11770414

申请日：2007-06-28

申请人： Takashi Hoshino ,  Shin Harada ,  Kazuhiro Fujikawa ,  Satoshi Hatsukawa ,  Kenichi Hirotsu

发明人： Takashi Hoshino ,  Shin Harada ,  Kazuhiro Fujikawa ,  Satoshi Hatsukawa ,  Kenichi Hirotsu

IPC分类号： H01L29/80

CPC分类号： H01L29/66068 ,  H01L29/0634 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/66446 ,  H01L29/66909 ,  H01L29/8083

摘要： A vertical JFET 1a according to the present invention has an n+ type drain semiconductor portion 2, an n-type drift semiconductor portion 3, a p+ type gate semiconductor portion 4, an n-type channel semiconductor portion 5, an n+ type source semiconductor portion 7, and a p+ type gate semiconductor portion 8. The n-type drift semiconductor portion 3 is placed on a principal surface of the n+ type drain semiconductor portion 2 and has first to fourth regions 3a to 3d extending in a direction intersecting with the principal surface. The p+ type gate semiconductor portion 4 is placed on the first to third regions 3a to 3c of the n-type drift semiconductor portion 3. The n-type channel semiconductor portion 5 is placed along the p+ type gate semiconductor portion 4 and is electrically connected to the fourth region 3d of the n-type drift semiconductor portion 3.

摘要翻译： 根据本发明的垂直JFET 1a具有n +型漏极半导体部分2，n型漂移半导体部分3，p +型栅极半导体部分4，n型沟道半导体部分5，n +型源半导体部分 7和p +型栅极半导体部分8.n型漂移半导体部分3放置在n +型漏极半导体部分2的主表面上，并且具有在与主体相交的方向上延伸的第一至第四区域3a至3d 表面。 p +型栅极半导体部分4放置在n型漂移半导体部分3的第一至第三区域3a至3c上.n型沟道半导体部分5沿着p +型栅极半导体部分4放置并且电连接 到n型漂移半导体部分3的第四区域3d。