公开(公告)号：US5951683A

公开(公告)日：1999-09-14

申请号：US995000

申请日：1997-12-19

申请人： Kazuhiro Yuuki ,  Yukihiro Katsumata ,  Takeo Tabata ,  Shinichiro Nakamura

发明人： Kazuhiro Yuuki ,  Yukihiro Katsumata ,  Takeo Tabata ,  Shinichiro Nakamura

IPC分类号： G06F11/20 ,  G06F11/00 ,  G06F11/22 ,  G06F11/27 ,  G06F15/177 ,  G06F9/445 ,  G06F15/00

CPC分类号： G06F15/177 ,  G06F11/22 ,  G06F11/2242 ,  G06F11/2284

摘要： One of processors connected effectively to a system is allocated to a master processor and the other remaining processors are allocated to slave processors. Each processor compares the self processor number of a processor number register and the processor number of the other processor of a processor effective register. For example, when the self processor number is smallest as compared with the other processor numbers, it is recognized that the self processor is a master processor. A master initialization diagnosing process after completion of the allocation is monitored by the slave processor. When an abnormality of the master processor is recognized, a degeneration to disconnect the master processor from the system is executed and is again reconstructed by the allocating process of master/slaves. Even when an abnormality occurs in the master processor, the operation in which the system was degenerated can be executed until the minimum construction in which two or more processors normally operate.

摘要翻译： 与系统有效连接的一个处理器被分配给主处理器，而其余的处理器被分配给从处理器。 每个处理器将处理器号寄存器的自处理器号与处理器有效寄存器的其他处理器的处理器号进行比较。 例如，当与其他处理器号码相比，自处理器数量最小时，认识到自处理器是主处理器。 完成分配后的主初始化诊断过程由从属处理器监控。 当识别主处理器的异常时，执行将主处理器从系统断开的退化，并且通过主/从站的分配处理再次重构。 即使主处理器发生异常，也可以执行系统退化的动作，直到两台以上的处理器正常工作的最小结构。

公开(公告)号：US6065930A

公开(公告)日：2000-05-23

申请号：US25627

申请日：1998-02-18

申请人： Yoich Sato ,  Hironobu Kageyama ,  Tadashi Kaneko ,  Takeo Tabata ,  Akihiro Yamazaki ,  Akiko Okada ,  Kazuhiro Yuuki

发明人： Yoich Sato ,  Hironobu Kageyama ,  Tadashi Kaneko ,  Takeo Tabata ,  Akihiro Yamazaki ,  Akiko Okada ,  Kazuhiro Yuuki

IPC分类号： H05K7/20 ,  G06F1/20 ,  B63H3/06

CPC分类号： G06F1/206

摘要： A cooling control apparatus controls a plurality of cooling members. The apparatus has a monitor which monitors states of predetermined combinations of the cooling members and a controller which controls the cooling members based on the states monitored by the monitor.

摘要翻译： 冷却控制装置控制多个冷却部件。 该装置具有监视器，其监视冷却构件的预定组合的状态以及基于由监视器监视的状态来控制冷却构件的控制器。

公开(公告)号：US5793945A

公开(公告)日：1998-08-11

申请号：US533650

申请日：1995-09-25

申请人： Takeo Tabata ,  Akiko Sato ,  Kazuhiro Yuuki ,  Akihiro Yamazaki ,  Naoki Izuta

发明人： Takeo Tabata ,  Akiko Sato ,  Kazuhiro Yuuki ,  Akihiro Yamazaki ,  Naoki Izuta

IPC分类号： G06F15/16 ,  G06F11/22 ,  G06F12/08 ,  G06F15/177 ,  G11C29/08

CPC分类号： G11C29/08 ,  G06F11/22

摘要： A device for the initial-diagnosing of processors is provided with a processor module, a storage unit, an address allocation unit and a diagnostic execution unit. The processor module has a processor and a cache storage unit. The storage unit stores an initial diagnostic setting program which diagnoses the processor and the cache storage unit. The address allocation unit allocates the addresses of the processor by making the addresses of the processor correspond to the addresses of the cache storage unit so that the cache storage unit is accessed by the processor. The diagnostic execution unit reads the initial diagnostic setting program stored in the storage unit into the addresses of the cache storage unit allocated by the address allocation unit, and executes the initial diagnostic setting program.

摘要翻译： 处理器模块，存储单元，地址分配单元和诊断执行单元提供用于初始诊断处理器的装置。 处理器模块具有处理器和高速缓存存储单元。 存储单元存储诊断处理器和高速缓存存储单元的初始诊断设置程序。 地址分配单元通过使处理器的地址对应于高速缓存存储单元的地址来分配处理器的地址，使得高速缓存存储单元被处理器访问。 诊断执行单元将存储在存储单元中的初始诊断设置程序读入由地址分配单元分配的高速缓存存储单元的地址，并执行初始诊断设置程序。