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    Data-flow processing system having an input packet limiting section for preventing packet input based upon a threshold value indicative of an optimum pipeline processing capacity
    2.
    发明授权
    Data-flow processing system having an input packet limiting section for preventing packet input based upon a threshold value indicative of an optimum pipeline processing capacity 失效
    数据流处理系统具有输入分组限制部分，用于基于指示最佳流水线处理能力的阈值来防止分组输入

    公开(公告)号：US5369775A

    公开(公告)日：1994-11-29

    申请号：US12624

    申请日：1993-02-02

    申请人： Tetsuo Yamasaki ,  Kenji Shima ,  Shinji Komori ,  Koichi Munakata ,  Yoshie Inaoka

    发明人： Tetsuo Yamasaki ,  Kenji Shima ,  Shinji Komori ,  Koichi Munakata ,  Yoshie Inaoka

    IPC分类号： G06F9/44 ,  G06F15/82

    CPC分类号： G06F9/4436 ,  G06F15/82

    摘要： A data-driven type computer system including an input limiting section for monitoring a current number of packets existing in the circular pipeline of the system while being processed. The input limiting section is adapted to control packets from being inputted from the external unit when the current number of packets exceeds a specified threshold value which is greater than a minimum packet number existing in the circular pipeline and which allows the attainment of the highest possible throughput of the system. The input limiting section further includes a predictive control unit to preliminarily analyze a current data flow graph to be processed in the system and also to take order in rank a possible rate of increase in the quantity of packets generated by a copying operation as well as a possible rate of reduction in the prior processing by the system. While being stored once for buffering by an input buffer, variation in the current quantity of deposited packets is predicted by the predictive control unit every time when packets are entered from an external source or from the output section, so that they are prevented from being entered by the input limiting section when the current quantity of deposited packets is in excess of the preset limit of the hardware.

    摘要翻译： 一种数据驱动型计算机系统，包括输入限制部分，用于在处理时监视系统的圆形流水线中当前数量的分组。 输入限制部分适用于当当前数据包数超过规定的阈值时，从外部单元输入分组，该阈值大于存在于圆形管道中的最小分组数，并允许达到最高可能吞吐量 的系统。 输入限制部分还包括：预测控制单元，用于对系统中要处理的当前数据流图进行初步分析，并且还可以按照复制操作生成的分组数量的增加可能的顺序排列， 可能的系统先前处理的减少率。 当由输入缓冲器存储一次用于缓冲时，每当从外部源或从输出部分输入分组时，由预测控制单元预测存储的分组的当前量的变化，从而防止其进入 当当前存储的数据包量超过硬件的预设限制时，通过输入限制部分。

    Program developing system allowing a specification definition to be represented by a plurality of different graphical, non-procedural representation formats
    4.
    发明授权
    Program developing system allowing a specification definition to be represented by a plurality of different graphical, non-procedural representation formats 失效
    程序开发系统允许规范定义由多个不同的图形，非程序化表示格式表示

    公开(公告)号：US5603018A

    公开(公告)日：1997-02-11

    申请号：US219866

    申请日：1994-03-30

    申请人： Hiroaki Terada ,  Hiroaki Nishikawa ,  Tetsuo Yamasaki ,  Yoshie Inaoka ,  Kenji Shima ,  Shin-ichi Yoshida ,  Shunji Hine ,  Youichiro Nishikawa ,  Shuji Hara

    发明人： Hiroaki Terada ,  Hiroaki Nishikawa ,  Tetsuo Yamasaki ,  Yoshie Inaoka ,  Kenji Shima ,  Shin-ichi Yoshida ,  Shunji Hine ,  Youichiro Nishikawa ,  Shuji Hara

    IPC分类号： G06F9/44 ,  G06F9/45

    CPC分类号： G06F8/34 ,  Y10S707/99931

    摘要： A program developing system includes a plurality of graphic editors representing specification definition information a user inputs in representation formats different from each other and a mutual conversion unit for converting specification definition which the user described with a graphic editor into a representation format of another graphic editor. The mutual conversion unit activates another graphic editor to allow input of specification definition by the converted representation format. The graphic editors can hierarchically represent specifications and allows specification description at an arbitrary level. The program developing system includes a parts management unit for registering description of semantically completed specification definition as parts and an execution unit for extracting executable program structure from the specification definition information represented by graphic editors and producing an executable program The executable program reserves the hierarchical structure in the specification description by the user. The execution unit executes a program at an arbitrary level and shows the execution results to the user. By execution and verification of the program at an arbitrary level, the user can know whether a program satisfying the specification is produced or not at a sub program level, which improves the program developing efficiency.

    摘要翻译： 程序开发系统包括表示用户以彼此不同的表示格式输入的规格定义信息的多个图形编辑器，以及用于将用图形编辑器描述的用户的规格定义转换为另一图形编辑器的表示格式的相互转换单元。 相互转换单元激活另一个图形编辑器，以允许通过转换的表示格式输入规范定义。 图形编辑器可以分级地表示规范，并允许任意级别的规范描述。 程序开发系统包括用于将语义完成的规范定义的描述注册为部件的部件管理单元和用于从由图形编辑器表示的规范定义信息中提取可执行程序结构的执行单元，并且生成可执行程序。可执行程序将 用户说明说明。 执行单元执行任意级别的程序，并向用户显示执行结果。 通过程序在任意级别的执行和验证，用户可以知道在子程序级别是否产生满足规范的程序，这提高了程序开发效率。

    Data driven type processor including a generation management system
    6.
    发明授权
    Data driven type processor including a generation management system 失效
    数据驱动式处理器，包括发电管理系统

    公开(公告)号：US5327569A

    公开(公告)日：1994-07-05

    申请号：US571737

    申请日：1990-08-23

    申请人： Kenji Shima ,  Yoshie Inaoka

    发明人： Kenji Shima ,  Yoshie Inaoka

    IPC分类号： G06F9/44 ,  G06F7/00

    CPC分类号： G06F9/4436

    摘要： A system for actualizing a process of a multi-generation packet by managing the generations of the packet inputted in a firing process module of a data driven type processor. The firing process module includes a generation management unit for rearranging the disk order of a sequence relationship associated with a periodic circulation of the generation numbers of a packet inputted. Further included is a subsystem for separating an address space in hashing when obtaining an address of a queuing memory of the firing process module.

    摘要翻译： 一种用于通过管理在数据驱动型处理器的点火处理模块中输入的分组的生成来实现多代分组的处理的系统。 射击处理模块包括生成管理单元，用于重新排列与输入的分组的生成号码的周期性循环相关联的序列关系的盘顺序。 还包括一个子系统，用于在获取点火处理模块的排队存储器的地址时，将哈希中的地址空间分开。