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    Data driven processor with data pairing apparatus combining a hash memory with counter directional data loops
    1.
    发明授权
    Data driven processor with data pairing apparatus combining a hash memory with counter directional data loops 失效
    数据驱动处理器与数据配对设备组合哈希存储器与反向数据循环

    公开(公告)号：US5072377A

    公开(公告)日：1991-12-10

    申请号：US121516

    申请日：1987-11-17

    申请人： Fumiyasu Asai ,  Shinji Komori

    发明人： Fumiyasu Asai ,  Shinji Komori

    IPC分类号： G06F15/82 ,  G06F9/44 ,  G06F12/00

    CPC分类号： G06F9/4436

    摘要： A data driven processing system includes a mechanism for generating a data pair from a sequential input data stream by matching identifier fields. The pairing mechanism comprises a hash memory in which input data words to be paired are stored by using hashed addresses. If a hash collision occurs, the data word which caused the hash collision is transmitted to a counter-directional data loop which is used to generate a data pair. If an input data word is not paired after one pass through the data loop it is returned to the hash memory for another pairing operation. Use of both the hash memory and the counter-directional data loop reduces the required hash memory size and increases processing efficiency.

    摘要翻译： 数据驱动处理系统包括用于通过匹配标识符字段从顺序输入数据流生成数据对的机制。 配对机制包括散列存储器，其中通过使用散列地址来存储要配对的输入数据字。 如果发生哈希冲突，则导致哈希冲突的数据字被发送到用于生成数据对的逆向数据循环。 如果输入数据字在一次通过数据循环后未配对，则返回到哈希存储器进行另一次配对操作。 使用散列存储器和逆向数据环路都可以减少所需的散列存储器大小并提高处理效率。

    Retrieving data using hash memory address generated by reversing /xor bits of selected bit strings of an input packet id
    8.
    发明授权
    Retrieving data using hash memory address generated by reversing /xor bits of selected bit strings of an input packet id 失效
    使用通过输入数据包ID的所选位串的倒置/位数产生的散列存储器地址来检索数据

    公开(公告)号：US5182799A

    公开(公告)日：1993-01-26

    申请号：US416887

    申请日：1989-10-04

    申请人： Toshiyuki Tamura ,  Masaki Fujita ,  Shinji Komori ,  Hisakazu Sato ,  Hidehiro Takata

    发明人： Toshiyuki Tamura ,  Masaki Fujita ,  Shinji Komori ,  Hisakazu Sato ,  Hidehiro Takata

    IPC分类号： G06F15/82 ,  G06F9/44 ,  G06F17/30

    CPC分类号： G06F17/30949 ,  G06F9/4436

    摘要： A data retrieving apparatus having an address generator for selecting partly at least one of bit strings of the identification data and generating a hashed address by a reversible operation thereof when a packet having an operand data and a plurality of identification data is inputted, a hash memory for being accessed by the hashed address, a match detector for comparing the identification data of the stored packet with the identification data of the inputted packet and judging match/mismatch thereof when a valid packet is already stored in the hashed address generated from the inputted packet, an associative memory unit for storing the identification data of the inputted packet as a retrieval data when the match detector judges to be mismatch, and judging match/mismatch of the identification data already stored with the identification data of the inputted packet when a packet is inputted, and an output selector for selecting an output from the hash memory or the associative memory unit in response to the result of judgement of said associative memory unit.

    摘要翻译： 一种数据检索装置，具有地址发生器，用于当输入具有操作数据和多个识别数据的分组时，部分地选择识别数据的比特串中的一个以及通过其可逆操作产生散列的地址，哈希存储器 用于通过散列地址访问的匹配检测器，用于将存储的分组的识别数据与输入的分组的识别数据进行比较，并且当有效分组已经存储在从输入分组生成的散列地址中时，判断匹配/不匹配 相关联存储单元，用于当匹配检测器判断为不匹配时，将输入的分组的识别数据存储为检索数据，并且当分组是分组时，判断已经存储的识别数据与输入分组的识别数据的匹配/不匹配 以及用于选择来自散列存储器或关联存储器uni的输出的输出选择器 响应于所述关联存储器单元的判断结果。