-
公开(公告)号：US07773825B2
公开(公告)日：2010-08-10
申请号：US11590815
申请日：2006-11-01
CPC分类号： G06T5/003 , G06T5/50 , H04N5/23248 , H04N5/23267
摘要： An image stabilization apparatus of the present invention includes a detection unit which detects an amount of an image blur between a plurality of image data, an evaluation unit which selects at least one image data to use in correcting image blur from the plurality of image data according to a result of the detection of the amount of image blur, and a correction unit which generates image data with its image blur corrected using the image data selected by the evaluation unit.
摘要翻译： 本发明的图像稳定装置包括：检测单元，其检测多个图像数据之间的图像模糊量;评估单元，其从多个图像数据中选择至少一个用于校正图像模糊的图像数据; 检测图像模糊量的结果;以及校正单元，其使用由评估单元选择的图像数据来校正其图像模糊的图像数据。
-
公开(公告)号：US20070098291A1
公开(公告)日：2007-05-03
申请号：US11590815
申请日：2006-11-01
IPC分类号： G06K9/40
CPC分类号： G06T5/003 , G06T5/50 , H04N5/23248 , H04N5/23267
摘要： An image stabilization apparatus of the present invention includes a detection unit which detects an amount of an image blur between a plurality of image data, an evaluation unit which selects at least one image data to use in correcting image blur from the plurality of image data according to a result of the detection of the amount of image blur, and a correction unit which generates image data with its image blur corrected using the image data selected by the evaluation unit.
摘要翻译： 本发明的图像稳定装置包括：检测单元，其检测多个图像数据之间的图像模糊量;评估单元，其从多个图像数据中选择至少一个用于校正图像模糊的图像数据; 检测图像模糊量的结果;以及校正单元，其使用由评估单元选择的图像数据来校正其图像模糊的图像数据。
-
公开(公告)号：US09088725B2
公开(公告)日：2015-07-21
申请号：US14001540
申请日：2012-02-24
申请人： Takeshi Hataguchi , Kazuhiko Takami
发明人： Takeshi Hataguchi , Kazuhiko Takami
CPC分类号： H04N5/2353 , G03B7/093 , H04N5/2351 , H04N13/239 , H04N13/296
摘要： A first control unit, which controls the timing when a first image pickup unit starts exposure, obtains a second difference by subtracting a first difference from an exposure-output time of the first image pickup unit, and outputs a first control signal for delaying the timing when the first image pickup unit starts exposure, by the second difference. The exposure-output time is a time lag between when the image pickup unit starts exposure and when output of an image signal obtained by the exposure is started. The first difference is a difference between a timing at which the first image pickup unit started outputting a predetermined image signal and a timing at which a second image pickup unit started an exposure for obtaining an image signal that the second image pickup unit outputted immediately after the first image pickup unit started outputting the predetermined image signal.
摘要翻译： 控制第一图像拍摄单元开始曝光的定时的第一控制单元通过从第一摄像单元的曝光输出时间减去第一差异来获得第二差，并输出用于延迟定时的第一控制信号 当第一图像拾取单元开始曝光时，第二个差异。 曝光 - 输出时间是当图像拾取单元开始曝光和当通过曝光获得的图像信号的输出开始时的时间滞后。 第一个区别是第一图像拾取单元开始输出预定图像信号的定时与第二图像拾取单元开始曝光的定时之间的差异，以获得图像信号，即第二图像拾取单元立即输出之后输出的图像信号 第一图像拾取单元开始输出预定图像信号。
-
4.发明授权Sampling clock adjusting method, and an interface circuit for displaying digital image 有权采样时钟调整方法，以及用于显示数字图像的接口电路公开(公告)号：US06501310B2
公开(公告)日：2002-12-31
申请号：US09805926
申请日：2001-03-15
申请人： Kazuhiko Takami
发明人： Kazuhiko Takami
IPC分类号： H03L700
摘要： The PLL (Phase Lock Loop) circuit generates a sampling clock for sampling an analog image signal and a second clock having a frequency equal to that of the sampling clock and a phase different from that of the sampling clock based on the horizontal synchronizing signal supplied together with the analog image signal. The measuring circuit counts the number of pulses of the sampling clock and the number of pulses of the second clock for a predetermined time period. The MPU (Micro Processing Unit) determines whether or not the numbers of pulses of the sampling clock and second clock have been counted correctly based on the number of pulses of the sampling clock and the number of pulses of the second clock. Then, the MPU adjusts the frequency and phase of the sampling clock, when it is determined that the numbers have been counted correctly.
摘要翻译： PLL（锁相环）电路产生用于对模拟图像信号进行采样的采样时钟和具有等于采样时钟的频率的第二时钟和基于一起提供的水平同步信号的与采样时钟不同的相位的相位 与模拟图像信号。 测量电路对采样时钟的脉冲数和第二时钟的脉冲数进行计数一定时间。 MPU（微处理单元）基于采样时钟的脉冲数和第二时钟的脉冲数确定采样时钟和第二时钟的脉冲数是否已被正确计数。 然后，当确定数字被正确计数时，MPU调整采样时钟的频率和相位。
-
公开(公告)号：US06560148B2
公开(公告)日：2003-05-06
申请号：US09978006
申请日：2001-10-17
申请人： Kazuhiko Takami , Yoshito Nakaoka
发明人： Kazuhiko Takami , Yoshito Nakaoka
IPC分类号： G11C700
CPC分类号： G11C7/1006 , G11C2207/002
摘要： Data of a plurality of memory cells are read on a plurality of first data lines and combined by a combination/rewrite circuit and transmitted on a second data line and the combined data is written back to the first data line. In combining data, the combination/rewrite circuit performs an addition. Mirrored data can be improved in reliability and a function of correcting an error of the mirror data can also be implemented.
-
公开(公告)号：US07030852B2
公开(公告)日：2006-04-18
申请号：US10122240
申请日：2002-04-16
申请人： Masahiro Ito , Kazuhiko Takami , Noboru Okuzono
发明人： Masahiro Ito , Kazuhiko Takami , Noboru Okuzono
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3666 , G09G5/005 , G09G5/006 , G09G2352/00
摘要： A liquid crystal display (LCD) panel unit is provided with a plurality of source drivers which are functionally divided into first and second source driver groups respectively assigned to first and second halves of an LCD panel. In order to properly drive the LCD panel irrespective of incoming pixel data of different formats, a pixel data rearrangement circuit is provided for rearranging the incoming pixel data to a predetermined data format. The data rearrangement circuit precedes the first and second source driver groups, and functions such as to receive 2N-path (N is a natural number) pixel data and rearranges the orders of the 2N-path pixel data according to the predetermined data format, and applies the rearranged N-path pixel data to the first source driver group and applying the rearranged other N-path pixel data to the second source driver group.
-
公开(公告)号：US20130329127A1
公开(公告)日：2013-12-12
申请号：US14001540
申请日：2012-02-24
申请人： Takeshi Hataguchi , Kazuhiko Takami
发明人： Takeshi Hataguchi , Kazuhiko Takami
IPC分类号： H04N5/235
CPC分类号： H04N5/2353 , G03B7/093 , H04N5/2351 , H04N13/239 , H04N13/296
摘要： A first control unit, which controls the timing when a first image pickup unit starts exposure, obtains a second difference by subtracting a first difference from an exposure-output time of the first image pickup unit, and outputs a first control signal for delaying the timing when the first image pickup unit starts exposure, by the second difference. The exposure-output time is a time lag between when the image pickup unit starts exposure and when output of an image signal obtained by the exposure is started. The first difference is a difference between a timing at which the first image pickup unit started outputting a predetermined image signal and a timing at which a second image pickup unit started an exposure for obtaining an image signal that the second image pickup unit outputted immediately after the first image pickup unit started outputting the predetermined image signal.
摘要翻译： 控制第一图像拍摄单元开始曝光的定时的第一控制单元通过从第一摄像单元的曝光输出时间减去第一差异来获得第二差，并输出用于延迟定时的第一控制信号 当第一图像拾取单元开始曝光时，第二个差异。 曝光 - 输出时间是当图像拾取单元开始曝光和当通过曝光获得的图像信号的输出开始时的时间滞后。 第一个区别是第一图像拾取单元开始输出预定图像信号的定时与第二图像拾取单元开始曝光的定时之间的差异，以获得图像信号，即第二图像拾取单元立即输出之后输出的图像信号 第一图像拾取单元开始输出预定图像信号。
-
8.发明授权Semiconductor memory device allowing test regardless of spare cell arrangement 失效半导体存储器件允许测试，而不管备用单元布置
公开(公告)号：US5970004A
公开(公告)日：1999-10-19
申请号：US114076
申请日：1998-07-13
申请人： Kazuhiko Takami , Kiyoomi Oshigoe , Mikio Asakura
发明人： Kazuhiko Takami , Kiyoomi Oshigoe , Mikio Asakura
IPC分类号： G01R31/28 , G11C11/401 , G11C16/06 , G11C29/00 , G11C29/04 , G11C7/00 , G11C8/00 , G11C16/04
CPC分类号： G11C29/70
摘要： A semiconductor memory device according to the present invention includes a block determining portion determining a difference in arrangement between a normal cell and a spare cell which replaces it, a data scramble controlling circuit generating a scramble ON signal when a normal cell is replaced by a spare cell and the spare cell stores inverted data, a scramble circuit inverting data to be written in response to the scramble ON signal, and a scramble circuit inverting data to be read in response to the scramble ON signal.
摘要翻译： 根据本发明的半导体存储器件包括块确定部分，用于确定正常单元和替换它的备用单元之间的布置差异;数据加扰控制电路，当正常单元被备用代替时产生加扰ON信号 单元和备用单元存储反相数据，加扰电路将要响应于加扰导通信号写入的数据反相，以及加扰电路，以响应于加扰导通信号反转待读取的数据。
-
-
-
-
-
-
-
搜索结果
8 条记录 (耗时 0.019 秒)
