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    Error correction encoding method and device, and communication system using the same
    2.
    发明授权
    Error correction encoding method and device, and communication system using the same 有权
    纠错编码方法和装置，以及使用相同的通信系统

    公开(公告)号：US08631299B2

    公开(公告)日：2014-01-14

    申请号：US13502420

    申请日：2010-11-11

    申请人： Kenya Sugihara ,  Hideo Yoshida ,  Yoshikuni Miyata

    发明人： Kenya Sugihara ,  Hideo Yoshida ,  Yoshikuni Miyata

    IPC分类号： H03M13/00 ,  H04L1/18

    CPC分类号： H03M13/1102 ,  H03M13/1174 ,  H03M13/1182 ,  H03M13/35 ,  H03M13/6516

    摘要： An error correction method and device and a communication system using them, including an LDPC code generation method capable of adjusting an encoding rate of an LDPC code in a variable manner while leaving the length of the code constant by use of an efficient encoding method or mechanism supporting a variable encoding rate, so that the encoding rate of the LDPC code can be adjusted without changing the code length. An error correction method includes a row dividing to divide each of a part or all of rows into two or more rows based on one parity check matrix, and a code construction to construct a plurality of LDPC codes with arbitrary code rates, respectively.

    摘要翻译： 一种误差校正方法和装置以及使用它们的通信系统，包括：LDPC码生成方法，其能够通过使用有效的编码方式或机构使码长度保持恒定，从而可变地调整LDPC码的编码率 支持可变编码率，可以在不改变码长的情况下调整LDPC码的编码率。 误差校正方法包括：基于一个奇偶校验矩阵将行的一部分或全部行分成两行或更多行的行划分，以及分别构造具有任意代码率的多个LDPC码的代码构造。

    METHOD AND DEVICE FOR ESTIMATING INPUT BIT ERROR RATIO
    3.
    发明申请
    METHOD AND DEVICE FOR ESTIMATING INPUT BIT ERROR RATIO 有权
    用于估计输入位错误比率的方法和装置

    公开(公告)号：US20130311840A1

    公开(公告)日：2013-11-21

    申请号：US13982403

    申请日：2012-02-20

    申请人： Yoshikuni Miyata ,  Kenya Sugihara ,  Kiyoshi Onohara ,  Kazuo Kubo ,  Hideo Yoshida ,  Takashi Mizuochi

    发明人： Yoshikuni Miyata ,  Kenya Sugihara ,  Kiyoshi Onohara ,  Kazuo Kubo ,  Hideo Yoshida ,  Takashi Mizuochi

    IPC分类号： G06F11/07

    CPC分类号： G06F11/076 ,  H04L1/203

    摘要： An input bit error ratio estimating method executed by a communication control unit includes a computing, a condition determining, a first input BER estimating, a second input BER estimating, a third input BER estimating, and an input BER estimation result outputting. In the condition determining, the communication control unit determines which of a plurality of conditions set in advance to be narrowed down to one has been established, based on a post-internal decoding residual error detection ratio. Based on the condition that is determined in the condition determining as one that has been established, the communication control unit selects one out of a plurality of processing procedures for estimating the input BER, namely, selects one of the first input BER estimating to the third input BER estimating and executes the selected processing.

    摘要翻译： 由通信控制单元执行的输入误码率估计方法包括计算，条件确定，第一输入BER估计，第二输入BER估计，第三输入BER估计和输入BER估计结果输出。 在所述条件判定中，所述通信控制部基于所述内部解码剩余错误检测率，确定预先设定为被缩小为一个的条件中的哪一个已被建立。 基于在确定为已经建立的条件中确定的条件，通信控制单元从用于估计输入BER的多个处理过程中选择一个，即，选择第三输入BER中的一个， 输入BER估计并执行所选择的处理。

    ERROR CORRECTION ENCODING METHOD AND DEVICE, AND COMMUNICATION SYSTEM USING THE SAME
    4.
    发明申请
    ERROR CORRECTION ENCODING METHOD AND DEVICE, AND COMMUNICATION SYSTEM USING THE SAME 有权
    错误校正编码方法和装置，以及使用该方法和装置的通信系统

    公开(公告)号：US20120210189A1

    公开(公告)日：2012-08-16

    申请号：US13502420

    申请日：2010-11-11

    申请人： Kenya Sugihara ,  Hideo Yoshida ,  Yoshikuni Miyata

    发明人： Kenya Sugihara ,  Hideo Yoshida ,  Yoshikuni Miyata

    IPC分类号： H03M13/05 ,  G06F11/10

    CPC分类号： H03M13/1102 ,  H03M13/1174 ,  H03M13/1182 ,  H03M13/35 ,  H03M13/6516

    摘要： An error correction method and device and a communication system using them, including an LDPC code generation method capable of adjusting an encoding rate of an LDPC code in a variable manner while leaving the length of the code constant by use of an efficient encoding method or mechanism supporting a variable encoding rate, so that the encoding rate of the LDPC code can be adjusted without changing the code length. An error correction method includes a row dividing to divide each of a part or all of rows into two or more rows based on one parity check matrix, and a code construction to construct a plurality of LDPC codes with arbitrary code rates, respectively.

    摘要翻译： 一种误差校正方法和装置以及使用它们的通信系统，包括：LDPC码生成方法，其能够通过使用有效的编码方式或机构使码长度保持恒定，从而可变地调整LDPC码的编码率 支持可变编码率，可以在不改变码长的情况下调整LDPC码的编码率。 误差校正方法包括：基于一个奇偶校验矩阵将行的一部分或全部行分成两行或更多行的行划分，以及分别构造具有任意代码率的多个LDPC码的代码构造。

    Method and device for estimating input bit error ratio
    5.
    发明授权
    Method and device for estimating input bit error ratio 有权
    用于估计输入误码率的方法和装置

    公开(公告)号：US09081677B2

    公开(公告)日：2015-07-14

    申请号：US13982403

    申请日：2012-02-20

    申请人： Yoshikuni Miyata ,  Kenya Sugihara ,  Kiyoshi Onohara ,  Kazuo Kubo ,  Hideo Yoshida ,  Takashi Mizuochi

    发明人： Yoshikuni Miyata ,  Kenya Sugihara ,  Kiyoshi Onohara ,  Kazuo Kubo ,  Hideo Yoshida ,  Takashi Mizuochi

    IPC分类号： G06F11/07 ,  H04L1/20

    CPC分类号： G06F11/076 ,  H04L1/203

    摘要： An input bit error ratio estimating method executed by a communication control unit includes a computing, a condition determining, a first input BER estimating, a second input BER estimating, a third input BER estimating, and an input BER estimation result outputting. In the condition determining, the communication control unit determines which of a plurality of conditions set in advance to be narrowed down to one has been established, based on a post-internal decoding residual error detection ratio. Based on the condition that is determined in the condition determining as one that has been established, the communication control unit selects one out of a plurality of processing procedures for estimating the input BER, namely, selects one of the first input BER estimating to the third input BER estimating and executes the selected processing.

    摘要翻译： 由通信控制单元执行的输入误码率估计方法包括计算，条件确定，第一输入BER估计，第二输入BER估计，第三输入BER估计和输入BER估计结果输出。 在所述条件判定中，所述通信控制部基于所述内部解码剩余错误检测率，确定预先设定为被缩小为一个的条件中的哪一个已被建立。 基于在确定为已经建立的条件中确定的条件，通信控制单元从用于估计输入BER的多个处理过程中选择一个，即，选择第三输入BER中的一个， 输入BER估计并执行所选择的处理。

    Transmitter and receiver, and method of varying a coding rate
    6.
    发明授权
    Transmitter and receiver, and method of varying a coding rate 有权

    公开(公告)号：US10340948B2

    公开(公告)日：2019-07-02

    申请号：US14762606

    申请日：2013-02-08

    申请人： Kenya Sugihara ,  Yoshikuni Miyata ,  Wataru Matsumoto

    发明人： Kenya Sugihara ,  Yoshikuni Miyata ,  Wataru Matsumoto

    IPC分类号： H03M13/11 ,  H03M13/00 ,  H04L1/00 ,  H03M13/03

    摘要： A data structure of a check matrix for the error correction code is a data structure of a check matrix for an error correction code, in which the error correction code is the LDPC code, and in which the check matrix has a matrix structure in which rows are rearranged for submatrices consisting of a part of columns of the check matrix. Moreover, in the method and device for varying the coding rate of the error correction code, a puncture position that is determined in accordance with a puncture position determination signal is a puncture position with which a number of columns in which two or more 1s are contained in a region of the check matrix that is directly affected by puncturing is minimized.

    LLR COMPUTATION DEVICE AND ERROR CORRECTION DECODING DEVICE
    8.
    发明申请
    LLR COMPUTATION DEVICE AND ERROR CORRECTION DECODING DEVICE 有权
    LLR计算设备和错误校正解码设备

    公开(公告)号：US20140229805A1

    公开(公告)日：2014-08-14

    申请号：US14343305

    申请日：2012-10-05

    申请人： Kenya Sugihara ,  Wataru Matsumoto

    发明人： Kenya Sugihara ,  Wataru Matsumoto

    IPC分类号： H04L1/00

    CPC分类号： H04L1/0045 ,  H03M13/1102 ,  H03M13/612 ,  H03M13/6337 ,  H04L1/005 ,  H04L1/0057 ,  H04L25/067 ,  H04L27/38 ,  H04L2025/0342

    摘要： A two-reference-point-pair determining unit 101 determines two reference point pairs by selecting two transmission symbol points with their LLR computation target bit being 0 and two transmission symbol points with their LLR computation target bit being 1. An LLR computation unit 113 assigns weights to the two LLRs calculated for the two reference point pairs, respectively, followed by adding them, and further adds to the addition result a correction term that may be zero sometimes, thus computing LLR for the two reference point pairs.

    摘要翻译： 双参考点对确定单元101通过选择两个传输符号点来确定两个参考点对，其LLR计算目标位为0，两个传输符号点的LLR计算目标位为1.LLR计算单元113分配 分别为两个参考点对计算的两个LLR的权重，然后将它们相加，并且进一步向加法结果添加可能为零的校正项，从而计算两个参考点对的LLR。

    LLR computation device and error correction decoding device
    9.
    发明授权
    LLR computation device and error correction decoding device 有权
    LLR计算装置和纠错解码装置

    公开(公告)号：US09438377B2

    公开(公告)日：2016-09-06

    申请号：US14343305

    申请日：2012-10-05

    申请人： Kenya Sugihara ,  Wataru Matsumoto

    发明人： Kenya Sugihara ,  Wataru Matsumoto

    IPC分类号： H03M13/00 ,  H04L1/00 ,  H04L25/06 ,  H03M13/11 ,  H04L27/38 ,  H04L25/03

    CPC分类号： H04L1/0045 ,  H03M13/1102 ,  H03M13/612 ,  H03M13/6337 ,  H04L1/005 ,  H04L1/0057 ,  H04L25/067 ,  H04L27/38 ,  H04L2025/0342

    摘要： A two-reference-point-pair determining unit 101 determines two reference point pairs by selecting two transmission symbol points with their LLR computation target bit being 0 and two transmission symbol points with their LLR computation target bit being 1. An LLR computation unit 113 assigns weights to the two LLRs calculated for the two reference point pairs, respectively, followed by adding them, and further adds to the addition result a correction term that may be zero sometimes, thus computing LLR for the two reference point pairs.

    摘要翻译： 双参考点对确定单元101通过选择两个传输符号点来确定两个参考点对，其LLR计算目标位为0，两个传输符号点的LLR计算目标位为1.LLR计算单元113分配 分别为两个参考点对计算的两个LLR的权重，然后将它们相加，并且进一步向加法结果添加可能为零的校正项，从而计算两个参考点对的LLR。