摘要:
A host bus adapter for use in secure network devices. The host bus adapter includes a network connector for connecting to a network such as a fiber-optic or Ethernet network. The network connector may connect to a physical layer device where the physical layer device is configured to receive high-speed network communications from the network connector. A decryption module is connected to the physical layer device for the decrypting high-speed encrypted network traffic received from the physical layer device. The host bus adapter includes an interface that is configured to connect to the host device. Authentication logic is included in the host bus adapter to authenticate and/or authenticate to a trusted partner.
摘要:
Secure point to point network connections. Secure communications are accomplished between connection points. The first partner sends authentication information to a second partner. The second partner authenticates the authentication information from the first partner to verify the identity of the first partner. If the identity of the first partner is verified, high-speed data maybe streamed to the first partner. A connection between the first and second partners is policed to discover unauthorized devices connected to the connection or to discover the disconnection of a partner from the connection. If an unauthorized device is discovered or if a partner is removed, high-speed data is no longer sent on the connection.
摘要:
Secure point to point network communications. Secure point to point network communications are accomplished by sending data across a secure link. Trusted partners at the link are matched to each other. To ensure that no un-trusted partners are on the link, authentication is performed. One of the points may be a secure tap. The secure tap authenticates a trusted partner by receiving a hardware embedded encryption key or value derived from the hardware embedded encryption key from the trusted partner. Data sent on the trusted link is encrypted to prevent interception of the data. The secure tap polices the link to ensure that no un-trusted partners are attached to the link and that the trusted partner is not removed from the link. If un-trusted partners are added to the link or trusted partners removed from the link, the secure tap ceases sending data.
摘要:
A network tap device that is configured for operation in a copper Gigabit Ethernet communications network using a power-over-Ethernet (“POE”) electrical supply is disclosed. In one embodiment, a network tap device powered by a POE supply is disclosed, comprising first and second network ports that are configured with receptacles for receiving communication cables. The communication cables are configured to carry both data signals and the POE supply to and from the network tap device. The network tap device further includes first and second tap ports that connect with additional communication cables to a monitoring device. The network tap device also includes control and regulation circuitry that is configured to receive the POE supply from the communication cables via the network ports and to enable components of the network tap device to be operated by the POE supply.
摘要:
A network tap device array capable of being powered by a power-over Ethernet (“POE”) supply is disclosed. The array enables data from multiple nodes in a communications network to be tapped and forwarded to a plurality of monitoring devices. In one embodiment the network tap device array includes a chassis that is configured to receive a plurality of network tap devices that are each powered by a POE supply. Each network tap device includes network ports for receiving and transmitting network data via communication cables and tap ports for forwarding the tapped network data to the monitoring device. In another embodiment, a sub-chassis includes a plurality of network tap devices and an aggregator that aggregates tapped data from each of the tap devices. The aggregator then forwards the aggregated data to the monitoring device. The sub-chassis can be included in a chassis that is configured to receive multiple populated chassis.
摘要:
An bit error rate tester for use in connection with a high speed networks. The bit error rate tester includes transmit and receive ports, as well as a sequence generator, memory, synchronizer, sequence start detect module, and comparator. The sequence generator generates a bit sequence for transmission through a network path. The bit sequence returns to the bit error rate tester by way of the receive port. The synchronizer then bit-aligns the received bit sequence to compensate for idles/fill words added/dropped as the bit sequence transited the network. The synchronized bit sequence is passed to the start word detector which detects start and end words in the bit sequence and instructs the comparator to compare only data between the start and end words. The comparator compares the received bit sequence with a copy of the transmitted bit sequence regenerated from the memory, and calculates a bit error rate.
摘要:
A cable node and a cable hub that communicate on a CATV network are configured to switch communication modes without signal loss or degradation due to delays in switching communication modes. In particular, a cable node sends one or more mute commands in an outgoing data stream to the cable hub, causing the cable hub to disable the RF outputs. Afterward, or along with the one or more mute commands, the cable node can send a switch mode command, thereby causing the cable hub to switch to the appropriate next communication mode, such as a communication mode using a new compression rate. When the cable hub has switched to the appropriate next communication mode, the cable hub can then properly receive and decode a corresponding data stream using the next communication mode.
摘要:
An optical signal return path system analog RF signals are sampled using a master clock frequency, and combined with digital data such as Ethernet data at a cable node. The cable node sends the combined signals on a return path over a fiber optic medium to the cable hub. The cable hub extracts an approximate in-frequency replicate of a master clock signal, and can use the replicate master clock signal to desample the digitized RF signals back to analog. The cable hub can further use the replicate of the master clock signal to serialize Ethernet data, and send the Ethernet data back to the cable node via an optical cable in the forward direction. Accordingly, a single master clock signal can be used on a CATV network for encoding/decoding, and transmitting a variety of data signals, which enhances the integrity and reliability of the data signals.
摘要:
A cable node and a cable hub that communicate on a CATV network are configured to switch compression modes without signal noise or degradation due to excessive delays in switching compression modes. In particular, a cable node sends one or more mute commands in an outgoing data stream to the cable hub, causing the cable hub to disable the RF outputs. Afterward, or along with the one or more mute commands, the cable node can send a switch mode command, thereby causing the cable hub to switch to the appropriate next communication mode, such as a communication mode using a new compression rate. When the cable node and the cable hub have switched to the appropriate next communication mode, the cable hub can then properly receive a corresponding data stream from the cable node using the next communication mode.
摘要:
An optical signal return path system includes a transmitter having a sample clock generator for generating a sample clock and an RF signal receiver for receiving and converting an analog RF data signal into a first data stream of digitized RF data samples at a rate determined by the sample clock. Supplemental channel circuitry provides a second data stream. A multiplexor receives and combines the first data stream and second data stream, and an optical transmitter converting the combined data stream into a serialized optical data signal for transmission over an optical fiber. The second data stream may contain maintenance data reflecting an operational state of the transmitter. A receiver receives the optical data signal and recovers therefrom a digital data stream and an associated first clock having an associated first clock rate. The data stream is stored in a memory device at the first clock rate. A clock generator generates a second clock having an associated second clock rate that is adjusted in accordance with a clock control signal. A control circuit reads data from the memory device at a rate corresponding to the second clock rate and generates a fullness signal that indicates whether the memory device is more full than a predefined threshold fullness level. A clock speed adjusting circuit generates the clock control signal in accordance with the fullness signal.