公开(公告)号：US20230057303A1

公开(公告)日：2023-02-23

申请号：US17679667

申请日：2022-02-24

Applicant: Kioxia Corporation

Inventor： Hiroyuki ISHII ,  Yuji NAGAI ,  Makoto MIAKASHI ,  Tomoko KAJIYAMA ,  Hayato KONNO

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/26 ,  G11C16/08

Abstract: A memory device includes a plurality of memory cell transistors, a first word line, a controller, and a storage circuit. Each of the plurality of memory cell transistors stores a plurality of pieces of bit data. The first word line is connected to a plurality of first memory cell transistors in the plurality of memory cell transistors. The controller performs a loop process including repetition of a program loop including a program operation and a first verification operation. The storage circuit stores status information. The controller performs the loop process, then performs a second verification operation, and stores first status data corresponding to a result of the loop process and second status data corresponding to a result of the second verification operation in the storage circuit, in a write operation using the plurality of first memory cell transistors as targets.

公开(公告)号：US20240428870A1

公开(公告)日：2024-12-26

申请号：US18744919

申请日：2024-06-17

Applicant: Kioxia Corporation

Inventor： Hayato KONNO ,  Makoto MIAKASHI

IPC: G11C16/34 ,  G11C16/16

Abstract: A memory includes a plurality of planes, a controller, and a source line. The controller is configured to erase data of each memory cell in an erase target block selected in each of the planes, by executing an erase sequence that repeats a plurality of loops, each of the loops including a set of an erase operation that erases the data of each memory cell in the erase target block and an erase verification operation that checks whether the data is erased. For each erase target block, the controller is configured to detect whether there is a current leak from the source line, determine validity of the erase sequence based on a detection result, and stop execution of the erase sequence for the erase target blocks that are determined not to be valid.