公开(公告)号：US20240268121A1

公开(公告)日：2024-08-08

申请号：US18595731

申请日：2024-03-05

Applicant: Kioxia Corporation

Inventor： Masaharu MIZUTANI ,  Masao SHINGU ,  Kensei TAKAHASHI

IPC: H10B43/35 ,  H10B43/27

CPC classification number: H10B43/35 ,  H10B43/27

Abstract: A semiconductor memory device according to an embodiment includes: a semiconductor layer extending in a first direction; a gate electrode layer including at least one metal element selected from a group consisting of tungsten (W), molybdenum (Mo), and cobalt (Co); a charge storage layer provided between the semiconductor layer and the gate electrode layer; and a first insulating layer provided between the charge storage layer and the gate electrode layer, the first insulating layer including a first region, the first region including aluminum (Al) and oxygen (O), the first insulating layer being in contact with the gate electrode layer.

公开(公告)号：US20240284676A1

公开(公告)日：2024-08-22

申请号：US18652167

申请日：2024-05-01

Applicant: Kioxia Corporation

Inventor： Masaaki HIGUCHI ,  Masaru KITO ,  Masao SHINGU

IPC: H10B43/27 ,  H01L29/66 ,  H01L29/792 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L29/66833 ,  H01L29/7926 ,  H10B43/35

Abstract: According to an embodiment, a non-volatile storage device includes a first layer, a second layer formed on the first layer, a stacked body including a plurality of conductive films stacked on the second layer, and a semiconductor pillar which penetrates the stacked body and the second layer and reaches the first layer. The semiconductor pillar includes a semiconductor film formed along an extending direction of the semiconductor pillar, and a memory film which covers a periphery of the semiconductor film. The memory film includes a first portion formed between the stacked body and the semiconductor film and a second portion formed between the second layer and the semiconductor film. An outer periphery of the second portion in a plane perpendicular to the extending direction is wider than an outer periphery of the first portion on a second layer side of the stacked body.

公开(公告)号：US20220301869A1

公开(公告)日：2022-09-22

申请号：US17472470

申请日：2021-09-10

Applicant: Kioxia Corporation

Inventor： Masahiro KOIKE ,  Masao SHINGU ,  Masaya ICHIKAWA

IPC: H01L21/02 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/26

Abstract: A semiconductor memory device includes a first conductive layer, a semiconductor layer extending in a first direction and being opposed to the first conductive layer, and a gate insulating film disposed between the first conductive layer and the semiconductor layer. The first conductive layer includes a first region, a second region disposed between the first region and the gate insulating film, and a third region disposed between the first region and the first interlayer insulating layer. The first to the third regions contain a metal. The third region contains silicon (Si). The first region does not contain silicon (Si) or has a lower silicon (Si) content than a silicon (Si) content in the third region. The second region does not contain silicon (Si) or has a lower silicon (Si) content than the silicon (Si) content in the third region.