公开(公告)号：US20250124989A1

公开(公告)日：2025-04-17

申请号：US18814679

申请日：2024-08-26

Applicant: Kioxia Corporation

Inventor： Akiyuki MURAYAMA ,  Yusuke ARAYASHIKI ,  Tsuyoshi OGIKUBO ,  Suzuka KAJIWARA ,  Motohiko FUJIMATSU ,  Katsuya NISHIYAMA ,  Kikuko SUGIMAE

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/10 ,  G11C16/16

Abstract: A semiconductor memory device includes: a memory cell array including a plurality of bit lines, a source line, a plurality of NAND strings, a first and a second sub block, a first word line group included in the first sub block, a second word line group included in the second sub block, and a dummy word line located between the first and second sub blocks; and a control circuit capable of applying predetermined voltages to the first word line group, the second word line group, and the dummy word line. When a specific word line belonging to the first word line group is selected for the execution of a write operation, a voltage higher than voltages applied to an unselected word line belonging to the first word line group and the second word line group is applied to the dummy word line.