公开(公告)号：US20240184532A1

公开(公告)日：2024-06-06

申请号：US18461971

申请日：2023-09-06

Applicant: Kioxia Corporation

Inventor： Naoaki KOKUBUN ,  Yuki KONDO

IPC: G06F7/72 ,  G06F17/16

CPC classification number: G06F7/724 ,  G06F17/16

Abstract: According to one embodiment, an arithmetic circuitry is configured to: calculate an AND value that is a result of an AND operation of elements a and b of a Galois field; and calculate, for each of a plurality of mutually different sets of (u, v), a {circumflex over ( )} (2u)×b {circumflex over ( )} (2v), which is a product of a 2u-th power of a and a 2v-th power of b, from an XOR operation based on the AND value and a connected tensor obtained by collecting a plurality of tensors different for each set.

公开(公告)号：US20230387942A1

公开(公告)日：2023-11-30

申请号：US18180481

申请日：2023-03-08

Applicant: Kioxia Corporation

Inventor： Yuki KONDO ,  Takahiro KUBOTA

IPC: H03M13/15 ,  G06F17/11

CPC classification number: H03M13/159 ,  G06F17/11

Abstract: A memory system according to an embodiment includes a nonvolatile memory and a memory controller. The nonvolatile memory stores data encoded by using an error correcting code for correcting n-bit errors(n is an integer of 3 or more) or less. The memory controller reads a received word from the nonvolatile memory, calculates a syndrome by using the read received word, estimates the number of bit errors by using the syndrome. When the number of bit errors is 2 or 3, the memory controller calculates an inverse element of a value calculated based on the syndrome, executes, by using the inverse element, variable transformation on a variable of an error locator polynomial corresponding to the number of bit errors and calculation of a root of a transformed polynomial obtained by transforming the error locator polynomial according to the variable transformation, executes variable inverse transformation on the root of the transformed polynomial to obtain the root of the error locator polynomial, and corrects the error in the error location corresponding to the root of the error locator polynomial.

公开(公告)号：US20230299794A1

公开(公告)日：2023-09-21

申请号：US17807038

申请日：2022-06-15

Applicant: Kioxia Corporation

Inventor： Naoaki KOKUBUN ,  Yuki KONDO ,  Hironori UCHIKAWA

IPC: H03M13/15

CPC classification number: H03M13/152 ,  H03M13/1545 ,  H03M13/1525

Abstract: A memory system includes a memory controller. The memory controller executes first calculation of obtaining a first degree to k-th degree error locator polynomials (1≤k

公开(公告)号：US20240275408A1

公开(公告)日：2024-08-15

申请号：US18439320

申请日：2024-02-12

Applicant: Kioxia Corporation

Inventor： Yuki KONDO ,  Kosuke MORINAGA

IPC: H03M13/15

CPC classification number: H03M13/1545 ,  H03M13/1575

Abstract: A memory system includes a non-volatile memory and a memory controller. The memory stores data encoded with an error correction code for correcting errors of n (n is 3 or more) bits or less. The controller estimates the number of error bits by using syndromes calculated from a received word. When the number of error bits is two or three, the controller executes variable transformation on a variable of an error locator polynomial corresponding to the number of error bits with a first value or a second value based on the syndromes. The controller also executes, with the first/second values, calculation of roots of a transformed polynomial obtained by converting the error locator polynomial. The controller obtains roots of the error locator polynomial by variable inverse transformation on the roots of the transformed polynomial and corrects the error of the error locations corresponding to the obtained roots.