公开(公告)号：US5402005A

公开(公告)日：1995-03-28

申请号：US291037

申请日：1994-08-15

申请人： Kohichi Takayama ,  Masanori Kinugasa ,  Munenobu Kida ,  Shuichi Shoji

发明人： Kohichi Takayama ,  Masanori Kinugasa ,  Munenobu Kida ,  Shuichi Shoji

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L23/48 ,  H01L29/46 ,  H01L29/54 ,  H01L29/62

CPC分类号： H01L23/528 ,  H01L23/5226 ,  H01L2924/0002

摘要： At least one slit having a predetermined shape is formed around a contact region of a lower wiring layer formed on a substrate, and an insulating portion formed integrally with an insulating layer is embedded in this slit. This insulating layer is formed on the lower wiring layer and has a contact hole located at a position corresponding to the contact region. Since the insulating portion as a rectangular projecting portion projects into the slit downwardly from the rigid insulating layer, positional errors caused by thermal expansion of the lower wiring layer in annealing of the upper wiring layer can be suppressed, and an abnormal geometry such as a projection on the upper wiring layer can be prevented. In addition, a semiconductor device free from interwiring short-circuiting and excellent in flatness can be obtained.

摘要翻译： 在形成在基板上的下布线层的接触区域周围形成具有预定形状的至少一个狭缝，并且与该绝缘层一体形成的绝缘部分嵌入该狭缝中。 该绝缘层形成在下布线层上，并具有位于与接触区域对应的位置的接触孔。 由于作为矩形突起部分的绝缘部分从刚性绝缘层向下突出到狭缝中，所以可以抑制由上部布线层的退火中的下部布线层的热膨胀引起的位置误差，以及诸如突起 可以防止在上部布线层上。 此外，可以获得没有相互连接短路并且具有优异的平坦度的半导体器件。