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    Multiplex data communication system
    1.
    发明授权
    Multiplex data communication system 失效
    多路复用数据通信系统

    公开(公告)号：US5825749A

    公开(公告)日：1998-10-20

    申请号：US625316

    申请日：1996-04-01

    申请人： Koji Terayama ,  Seiji Hirano ,  Toshiaki Kawanishi ,  Toshifumi Ikeda ,  Hiroaki Sakamoto

    发明人： Koji Terayama ,  Seiji Hirano ,  Toshiaki Kawanishi ,  Toshifumi Ikeda ,  Hiroaki Sakamoto

    IPC分类号： B60R16/02 ,  B60R16/03 ,  H04L12/413 ,  H04J3/02

    CPC分类号： H04L12/40032 ,  B60R16/0315 ,  H04L12/4135 ,  H04L2012/40273

    摘要： A multiplex data communication system including a number of communication nodes interconnected through a transmission path, each of which includes a data transmitting/receiving circuit providing a reception signal representative of normal data reception from another communication node and a transmission signal representative of normal data transmission therefrom, and a data operation circuit for controlling an electronic equipment unit associated with each communication node based on the data from the other communication node and generating the data relating to each communication node which is transmitted by the data transmitting/receiving circuit, the data operation circuit making a judgement of normality of a data communication function of each communication node based on at least one of the data reception signal and data transmission signal.

    摘要翻译： 一种复用数据通信系统，包括通过传输路径互联的多个通信节点，每个通信节点包括数据发送/接收电路，该数据发送/接收电路提供表示来自另一个通信节点的正常数据接收的接收信号， 以及数据运算电路，用于根据来自其他通信节点的数据控制与每个通信节点相关联的电子设备单元，并产生与由数据发送/接收电路发送的每个通信节点相关的数据，数据操作电路 基于数据接收信号和数据发送信号中的至少一个，对每个通信节点的数据通信功能的正常性进行判断。

    Data storing system for a communication control circuit
    4.
    发明授权
    Data storing system for a communication control circuit 失效
    用于通信控制电路的数据存储系统

    公开(公告)号：US5311510A

    公开(公告)日：1994-05-10

    申请号：US919911

    申请日：1992-07-27

    申请人： Hiroo Moriue ,  Yutaka Matsuda ,  Kiyoshi Inoue ,  Yoshikazu Nobutoki ,  Seiji Hirano ,  Hiroaki Sakamoto

    发明人： Hiroo Moriue ,  Yutaka Matsuda ,  Kiyoshi Inoue ,  Yoshikazu Nobutoki ,  Seiji Hirano ,  Hiroaki Sakamoto

    IPC分类号： G06F13/38 ,  H04L12/56

    CPC分类号： G06F13/385

    摘要： The data storing system according to the present invention is used for a communication control circuit. The communication control circuit is equipped with a communication sequencer, which takes in a message to be transmitted to a multiplex bus, an ID table which registers data IDs of messages necessary for the station, and the first and second memory circuits which have memory areas keyed to the data IDs. When the communication sequencer takes in a message, it determines whether its data ID exists in the ID table. If the data ID exists and the frequency of occurrence is high, then data following the data ID is temporarily stored in a memory area keyed to a data ID of the first memory circuit. If the data ID exists and the frequency of occurrence is low, then the data following the data ID is temporarily stored in a memory area of the second memory circuit. When a CPU reads the aforementioned stored data, it sets the status area of the storage area, in which the data was stored, for a state that enables a data storage change.

    摘要翻译： 根据本发明的数据存储系统用于通信控制电路。 通信控制电路配备有通信定序器，其接收要发送到多路复用总线的消息，登记该站所需消息的数据ID的ID表以及具有存储区域的第一和第二存储器电路 到数据ID。 当通信定序器接收消息时，它确定其数据ID是否存在于ID表中。 如果数据ID存在且发生频率高，则数据ID之后的数据被临时存储在与第一存储器电路的数据ID相对应的存储区域中。 如果数据ID存在且发生频率低，则数据ID之后的数据被临时存储在第二存储器电路的存储区域中。 当CPU读取上述存储的数据时，它设置存储数据的存储区域的状态区域，以使数据存储改变的状态。

    Multiplex transmission system
    5.
    发明授权
    Multiplex transmission system 失效
    多路传输系统

    公开(公告)号：US5357525A

    公开(公告)日：1994-10-18

    申请号：US860897

    申请日：1992-03-31

    申请人： Hiroo Moriue ,  Yutaka Matsuda ,  Kyosuke Hashimoto ,  Kiyoshi Inoue ,  Seiji Hirano ,  Osamu Michihira ,  Yoshikazu Nobutoki ,  Hiroaki Sakamoto

    发明人： Hiroo Moriue ,  Yutaka Matsuda ,  Kyosuke Hashimoto ,  Kiyoshi Inoue ,  Seiji Hirano ,  Osamu Michihira ,  Yoshikazu Nobutoki ,  Hiroaki Sakamoto

    IPC分类号： H04L1/00 ,  H04L1/18 ,  H04L25/49 ,  G08C25/02

    CPC分类号： H04L1/1874 ,  H04L1/1803 ,  H04L25/4902 ,  H04L2001/0093

    摘要： A multiplex transmission system of this invention includes a plurality of multiplex nodes interconnected by a common multiplex transmission line. A frame of data is transmitted among the multiplex nodes through the multiplex transmission line. When a data frame transmitted from an air conditioner switch multiplex node (subnode) is received, an air conditioner unit multiplex node (main node), which is predetermined as a destination node, detects the contents of each data from an ID-a of the received data, performs a calculation on SOM to DATA 4 received, generates collation data (CRC) in accordance with the result of the calculation and transmits same. The subnode generates collation data (CRC), which is an error check code, through a calculation on the transmitted SOM to DATA 4, and compares the thus-generated CRC with the CRC received from the main node, to determine whether or not the data transmission was properly carried out. When the data transmission was carried out properly, the subnode returns a signal ACK3, and when the data transmission failed, the data frame is retransmitted, whereby the subnode need not have an ACK management function.

    摘要翻译： 本发明的复用传输系统包括通过公共多路复用传输线互连的多个复用节点。 通过复用传输线在多路复用节点之间传输数据帧。 当接收到从空调开关多路复用节点（子节点）发送的数据帧时，作为目的地节点预先确定的空调机组复用节点（主节点）从ID-a的每个数据的内容检测出 接收到的数据，对接收到的数据4进行SOM计算，根据计算结果生成核对数据（CRC）并进行发送。 子节点通过对发送的SOM到DATA 4的计算产生作为错误校验码的校验数据（CRC），并将这样生成的CRC与从主节点接收到的CRC进行比较，以确定数据是否 传输得到了适当的实施。 当数据传输正确进行时，子节点返回信号ACK3，当数据传输失败时，数据帧被重传，子节点不需要具有ACK管理功能。

    Multiplex transmission system
    6.
    发明授权
    Multiplex transmission system 失效
    多路传输系统

    公开(公告)号：US5343475A

    公开(公告)日：1994-08-30

    申请号：US860896

    申请日：1992-03-31

    申请人： Yutaka Matsuda ,  Hiroo Moriue ,  Yoshikazu Nobutoki ,  Seiji Hirano ,  Hiroaki Sakamoto

    发明人： Yutaka Matsuda ,  Hiroo Moriue ,  Yoshikazu Nobutoki ,  Seiji Hirano ,  Hiroaki Sakamoto

    IPC分类号： G06F13/42 ,  B60R16/02 ,  B60R16/03 ,  H04L1/00 ,  H04L1/16 ,  H04L12/413 ,  H04J3/24 ,  H04J3/02 ,  H04L1/18

    CPC分类号： H04L1/1664 ,  H04L1/0083 ,  H04L12/4135 ,  B60R16/0315

    摘要： A multiplex transmission system of this invention includes a plurality of multiplex nodes interconnected by a common multiplex transmission line. A plurality of groups of different combinations of the multiplex nodes are predetermined, and a frame of data is transmitted among the multiplex nodes through the multiplex transmission line. The data frame includes a group specifying area specifying a group of nodes from which an acknowledge signal is to be returned. When a data frame transmitted from a sending node is received, each multiplex node determines whether or not it belongs to the group specified by bits in the group specifying area of the transmitted frame. When the data frame is properly received, only those multiplex nodes which belong to the specified group return the acknowledge signals to an acknowledge signal area in the data frame in accordance with the bits in the group specifying area, whereby the transmission efficiency is improved.

    摘要翻译： 本发明的复用传输系统包括通过公共多路复用传输线互连的多个复用节点。 多路复用节点的不同组合的多个组被预先确定，并且通过复用传输线在多路复用节点之间发送数据帧。 数据帧包括指定要从其返回确认信号的一组节点的组指定区域。 当接收到从发送节点发送的数据帧时，每个多路复用节点确定其是否属于由发送帧的组指定区域中的位指定的组。 当正确地接收到数据帧时，只有属于指定组的那些多路复用节点根据组指定区域中的位将确认信号返回到数据帧中的确认信号区域，从而提高了传输效率。

    Integrated-circuit card equipped with a single chip data processor automatically entering low-power consumption mode
    10.
    发明授权
    Integrated-circuit card equipped with a single chip data processor automatically entering low-power consumption mode 失效
    集成电路卡配备有单芯片数据处理器，自动进入低功耗模式

    公开(公告)号：US5410714A

    公开(公告)日：1995-04-25

    申请号：US872528

    申请日：1992-04-23

    申请人： Yoshikazu Yorimoto ,  Masashi Takahashi ,  Seiji Hirano

    发明人： Yoshikazu Yorimoto ,  Masashi Takahashi ,  Seiji Hirano

    IPC分类号： G06F1/32 ,  G06K19/07

    CPC分类号： G06F1/3215 ,  G06K19/07

    摘要： A semiconductor integrated-circuit card including a microprocessor having an active mode of operation capable of processing data and a low power consumption mode of operation disabled from processing data, the microprocessor being operative to (1) establish the low power consumption mode of operation in the IC card when the microprocessor is initially activated to start operation, (2) make a shift from the low power consumption mode of operation to the active mode of operation responsive to an interrupt signal from an external signal source, and (3) make a shift from the active mode of operation back to the low power consumption mode of operation upon termination of the data processing in the active mode of operation.

    摘要翻译： 一种半导体集成电路卡，包括具有能够处理数据的主动操作模式和从处理数据禁止的低功耗操作模式的微处理器，所述微处理器可操作以（1）在所述微处理器中建立所述低功耗操作模式 微处理器最初被激活以启动操作时的IC卡;（2）响应于来自外部信号源的中断信号，从低功耗操作模式转换到主动模式，以及（3）进行移位 在主动操作模式下的数据处理结束时，从主动模式返回到低功耗模式。