公开(公告)号：USD656108S1

公开(公告)日：2012-03-20

申请号：US29396466

申请日：2011-06-30

Applicant: Kun-Jung Wu

Designer： Kun-Jung Wu

公开(公告)号：US20060183256A1

公开(公告)日：2006-08-17

申请号：US11207895

申请日：2005-08-22

Applicant: Ju-Hsin Chi ,  Kun-Jung Wu ,  Pin-Yuan Yu ,  Yu-Chi Lin ,  Yung-Chih Lin

Inventor： Ju-Hsin Chi ,  Kun-Jung Wu ,  Pin-Yuan Yu ,  Yu-Chi Lin ,  Yung-Chih Lin

IPC: H01L21/66

CPC classification number: H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of piping defect detection is provided. A semiconductor substrate having an active region and an isolation region is provided, a plurality of semiconductor elements are formed on the semiconductor substrate, a dielectric layer is deposited on the semiconductor substrate and the semiconductor elements, and first and second contact plugs are formed in the dielectric layer to connect the active region and the isolation region respectively. The first contact plug and the second contact plug are illuminated by an electron beam, accumulating charge on the second contact plug, and piping defects are detected between the first contact plug and the second contact plug according to brightness contrast between the first contact plug and the second contact plug.

Abstract translation: 提供了一种管道缺陷检测方法。 提供了具有有源区和隔离区的半导体衬底，在半导体衬底上形成多个半导体元件，在半导体衬底和半导体元件上淀积电介质层，第一和第二接触插塞形成在 电介质层分别连接有源区和隔离区。 第一接触插塞和第二接触插塞由电子束照射，在第二接触插塞上积累电荷，并且根据第一接触插塞和第二接触插塞之间的亮度对比度在第一接触插塞和第二接触插塞之间检测管道缺陷 第二个接触插头

公开(公告)号：US06551877B1

公开(公告)日：2003-04-22

申请号：US10064092

申请日：2002-06-11

Applicant: Kun-Jung Wu

Inventor： Kun-Jung Wu

IPC: H01L218242

CPC classification number: H01L27/10888 ,  H01L21/76897 ,  H01L27/10814

Abstract: A method of manufacturing a memory device. A substrate having an active region, a plurality of gate structures and a plurality of source/drain regions are provided. An inter-layer dielectric layer is formed over the substrate. A global opening that exposes the source/drain regions for forming contacts and the gate structures inside the active region is formed in the inter-layer dielectric layer. A conductive layer that completely fills the global opening is formed over the substrate. A portion of the conductive layer and the inter-layer dielectric layer is removed to expose the upper surface of the gate structures, thereby forming a plurality of contacts between the gate structures.

Abstract translation: 一种制造存储器件的方法。 提供具有有源区，多个栅极结构和多个源极/漏极区的衬底。 在衬底上形成层间电介质层。 在层间电介质层中形成露出用于形成触点的源极/漏极区域和有源区域内的栅极结构的全局开口。 完全填充全局开口的导电层形成在衬底上。 去除导电层和层间电介质层的一部分以露出栅极结构的上表面，由此在栅极结构之间形成多个触点。

公开(公告)号：US20100177459A1

公开(公告)日：2010-07-15

申请号：US12353260

申请日：2009-01-14

Applicant: Kun-Jung Wu ,  Nagai Yukihiro

Inventor： Kun-Jung Wu ,  Nagai Yukihiro

IPC: H01G4/005 ,  H01L21/20

CPC classification number: H01L28/92 ,  H01L27/0207 ,  H01L27/10852

Abstract: A process for fabricating crown capacitors is described. A substrate having a template layer thereon is provided. A patterned support layer is formed over the template layer. A sacrifice layer is formed over the substrate covering the patterned support layer. Holes are formed through the sacrifice layer, the patterned support layer and the template layer, wherein the patterned support layer is located at a depth at which bowing of the sidewalls of the holes occurs and is bowed less than the sacrifice layer at the sidewalls. A substantially conformal conductive layer is formed over the substrate. The conductive layer is then divided into lower electrodes of the crown capacitors.

Abstract translation: 描述制造冠状电容器的方法。 提供其上具有模板层的基板。 在模板层上形成图案化支撑层。 牺牲层形成在覆盖图案化支撑层的​​基板上。 通过牺牲层，图案化的支撑层和模板层形成孔，其中图案化的支撑层位于在孔的侧壁弯曲发生的深度处，并且比侧壁处的牺牲层弯曲得少。 在衬底上形成基本上保形的导电层。 然后将导电层分成冠电容器的下电极。

公开(公告)号：US07442561B2

公开(公告)日：2008-10-28

申请号：US11207895

申请日：2005-08-22

Applicant: Ju-Hsin Chi ,  Kun-Jung Wu ,  Pin-Yuan Yu ,  Yu-Chi Lin ,  Yung-Chih Lin

Inventor： Ju-Hsin Chi ,  Kun-Jung Wu ,  Pin-Yuan Yu ,  Yu-Chi Lin ,  Yung-Chih Lin

IPC: H01L21/00

CPC classification number: H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of piping defect detection is provided. A semiconductor substrate having an active region and an isolation region is provided, a plurality of semiconductor elements are formed on the semiconductor substrate, a dielectric layer is deposited on the semiconductor substrate and the semiconductor elements, and first and second contact plugs are formed in the dielectric layer to connect the active region and the isolation region respectively. The first contact plug and the second contact plug are illuminated by an electron beam, accumulating charge on the second contact plug, and piping defects are detected between the first contact plug and the second contact plug according to brightness contrast between the first contact plug and the second contact plug.

Abstract translation: 提供了一种管道缺陷检测方法。 提供了具有有源区和隔离区的半导体衬底，在半导体衬底上形成多个半导体元件，在半导体衬底和半导体元件上淀积电介质层，第一和第二接触插塞形成在 电介质层分别连接有源区和隔离区。 第一接触插塞和第二接触插塞由电子束照射，在第二接触插塞上积累电荷，并且根据第一接触插塞和第二接触插塞之间的亮度对比度在第一接触插塞和第二接触插塞之间检测管道缺陷 第二个接触插头

公开(公告)号：US06703855B1

公开(公告)日：2004-03-09

申请号：US10308074

申请日：2002-12-03

Applicant: Kun-Jung Wu ,  Chia-Cheng Wang

Inventor： Kun-Jung Wu ,  Chia-Cheng Wang

IPC: G01R3102

CPC classification number: G01R1/06722 ,  H01R11/18

Abstract: A structure of a probe is disclosed. The structure of the probe comprises a tube which comprises a larger end and a smaller end with a through hole disposed therewith, an axle having a supporting portion is positioned on the larger end of the tube, wherein the supporting portion comprises a fitting aperture, a pointed element fixed into the fitting aperture of the axle passes through the through hole of the tube, a positioning element positioned at a predetermined portion of the pointed element, a resilient element positioned around the axle, and a positioning cap comprising a through channel for fitting onto the axle and pressing against a juncture of the tube, wherein a smaller end of the positioning cap is formed as a positioning portion for positioning the resilient element. The pointed element is elastically slidable within the tube is used for probing.

Abstract translation: 公开了一种探针的结构。 探头的结构包括一个管子，它包括一个较大的端部，一个较小的端部带有一个通孔，一个具有一个支撑部分的轴定位在该管子的较大端上，其中该支撑部分包括一个安装孔，一个 固定到轴的配合孔中的尖头元件穿过管的通孔，定位元件定位在尖锐元件的预定部分处，围绕轴定位的弹性元件，以及定位帽，其包括用于配合的通道 在轴上并压靠在管的接合处，其中定位帽的较小端形成为用于定位弹性元件的定位部分。 尖头元件在管内可弹性滑动，用于探测。

公开(公告)号：US06670254B1

公开(公告)日：2003-12-30

申请号：US10065298

申请日：2002-10-01

Applicant: Kun-Jung Wu

Inventor： Kun-Jung Wu

IPC: H01L21336

CPC classification number: H01L21/76897 ,  H01L21/2652 ,  H01L21/823425 ,  H01L29/6659

Abstract: A method of manufacturing semiconductor devices. A gate structure is formed over a substrate. A dopant implantation is carried out to form a lightly doped region in the substrate on each side of the gate structure. An insulation layer is formed over the substrate. A portion of the insulation is later removed so that a portion of the insulation layer is retained over the substrate on each side of the gate structure. A spacer is formed on each sidewall of the gate structure. Another ion implantation is carried out such that the dopants penetrate through the insulation layer on the substrate on each side of the gate structure to form a heavily doped region in the substrate.

Abstract translation: 一种制造半导体器件的方法。 栅极结构形成在衬底上。 进行掺杂剂注入以在栅极结构的每一侧上的衬底中形成轻掺杂区域。 在衬底上形成绝缘层。 绝缘层的一部分稍后被去除，使得绝缘层的一部分被保持在栅极结构的每一侧上的衬底上。 在栅极结构的每个侧壁上形成间隔物。 执行另一种离子注入，使得掺杂剂穿过栅极结构的每一侧上的衬底上的绝缘层，以在衬底中形成重掺杂区域。

公开(公告)号：USD653223S1

公开(公告)日：2012-01-31

申请号：US29396472

申请日：2011-06-30

Applicant: Kun-Jung Wu

Designer： Kun-Jung Wu

公开(公告)号：US07951668B2

公开(公告)日：2011-05-31

申请号：US12353260

申请日：2009-01-14

Applicant: Kun-Jung Wu ,  Nagai Yukihiro

Inventor： Kun-Jung Wu ,  Nagai Yukihiro

IPC: H01L21/8242

CPC classification number: H01L28/92 ,  H01L27/0207 ,  H01L27/10852

Abstract: A process for fabricating crown capacitors is described. A substrate having a template layer thereon is provided. A patterned support layer is formed over the template layer. A sacrifice layer is formed over the substrate covering the patterned support layer. Holes are formed through the sacrifice layer, the patterned support layer and the template layer, wherein the patterned support layer is located at a depth at which bowing of the sidewalls of the holes occurs and is bowed less than the sacrifice layer at the sidewalls. A substantially conformal conductive layer is formed over the substrate. The conductive layer is then divided into lower electrodes of the crown capacitors.

Abstract translation: 描述制造冠状电容器的方法。 提供其上具有模板层的基板。 在模板层上形成图案化支撑层。 牺牲层形成在覆盖图案化支撑层的​​基板上。 通过牺牲层，图案化的支撑层和模板层形成孔，其中图案化的支撑层位于在孔的侧壁弯曲发生的深度处，并且比侧壁处的牺牲层弯曲得少。 在衬底上形成基本上保形的导电层。 然后将导电层分成冠电容器的下电极。

公开(公告)号：US06234915B1

公开(公告)日：2001-05-22

申请号：US09345006

申请日：1999-07-02

Applicant: Kun-Jung Wu

Inventor： Kun-Jung Wu

IPC: A63B5302

CPC classification number: A63B53/0487 ,  A63B53/02 ,  A63B53/065 ,  A63B53/08 ,  A63B60/54 ,  A63B2053/023 ,  A63B2053/0416 ,  A63B2053/0491

Abstract: A three-piece golf putter comprises a putter head, an anti-shock slat, and a neck. The neck made of a material differs from that of the putter head and the anti-shock slat in specific gravity. So that, by replacing the neck with different specific gravity or different angle of elevation, the center of gravity may be adjusted to the best position to match with various striking postures. Moreover, by selecting the anti-shock slat in different specific gravities, depth of the center of gravity may be changed in order to enlarge region of the sweet spot for easy grasp.

Abstract translation: 三件式高尔夫推杆包括推杆头，防震板条和颈部。 由材料制成的颈部不同于推杆头和防冲击板条的比重。 这样，通过用不同的比重或不同的仰角代替颈部，可以将重心调整到最佳位置，以配合各种打击姿态。 此外，通过选择不同比重的抗冲击板条，可以改变重心的深度，以便放大甜点的区域以便于把握。