公开(公告)号：US20110216877A1

公开(公告)日：2011-09-08

申请号：US13110948

申请日：2011-05-19

申请人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kuo-Chang Su ,  Yu-Chung Yang

发明人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kuo-Chang Su ,  Yu-Chung Yang

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2310/0286

摘要： A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

摘要翻译： 具有波形整形功能的移位寄存器电路包括多个移位寄存器级。 每个移位寄存器级包括第一输入单元，上拉单元，下拉电路，第二输入单元，控制单元和波形整形单元。 第一输入单元用于响应于第一门信号输出第一驱动控制电压。 上拉单元响应于第一驱动控制电压拉起第二门信号。 下拉电路用于下拉第一驱动控制电压和第二栅极信号。 第二输入单元用于响应于第一门信号输出第二驱动控制电压。 控制单元响应于第二驱动控制电压和辅助信号提供控制信号。 波形整形单元响应于控制信号对第二门信号执行波形整形操作。

公开(公告)号：US08331524B2

公开(公告)日：2012-12-11

申请号：US13110948

申请日：2011-05-19

申请人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kuo-Chang Su ,  Yu-Chung Yang

发明人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kuo-Chang Su ,  Yu-Chung Yang

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2310/0286

摘要： A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

摘要翻译： 具有波形整形功能的移位寄存器电路包括多个移位寄存器级。 每个移位寄存器级包括第一输入单元，上拉单元，下拉电路，第二输入单元，控制单元和波形整形单元。 第一输入单元用于响应于第一门信号输出第一驱动控制电压。 上拉单元响应于第一驱动控制电压拉起第二门信号。 下拉电路用于下拉第一驱动控制电压和第二栅极信号。 第二输入单元用于响应于第一门信号输出第二驱动控制电压。 控制单元响应于第二驱动控制电压和辅助信号提供控制信号。 波形整形单元响应于控制信号对第二门信号执行波形整形操作。

公开(公告)号：US20120120035A1

公开(公告)日：2012-05-17

申请号：US13204941

申请日：2011-08-08

申请人： Yu-Chung YANG ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

发明人： Yu-Chung YANG ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0205

摘要： A LCD panel with an improved pixel array configuration is provided. The LCD panel uses a column inversion driving method to drive the data lines so as to achieve a stable common voltage. Moreover, by cross-connecting the layout traces of the wiring zone in a specified manner, the gate pulses outputted from every two gate lines neighboring the sub-pixel are not overlapped with each other, so that the frame can be normally displayed.

摘要翻译： 提供了具有改进的像素阵列配置的LCD面板。 LCD面板使用列反转驱动方法驱动数据线，以达到稳定的公共电压。 此外，通过以指定的方式交叉连接布线区的布局迹线，从与子像素相邻的每两个栅极线输出的栅极脉冲彼此不重叠，从而可以正常显示该帧。

公开(公告)号：US08723772B2

公开(公告)日：2014-05-13

申请号：US13204941

申请日：2011-08-08

申请人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

发明人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0205

摘要： A LCD panel with an improved pixel array configuration is provided. The LCD panel uses a column inversion driving method to drive the data lines so as to achieve a stable common voltage. Moreover, by cross-connecting the layout traces of the wiring zone in a specified manner, the gate pulses outputted from every two gate lines neighboring the sub-pixel are not overlapped with each other, so that the frame can be normally displayed.

摘要翻译： 提供了具有改进的像素阵列配置的LCD面板。 LCD面板使用列反转驱动方法驱动数据线，以达到稳定的公共电压。 此外，通过以指定的方式交叉连接布线区的布局迹线，从与子像素相邻的每两个栅极线输出的栅极脉冲彼此不重叠，从而可以正常显示该帧。

公开(公告)号：US08502948B2

公开(公告)日：2013-08-06

申请号：US12858433

申请日：2010-08-17

申请人： Kuo-Chang Su ,  Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen

发明人： Kuo-Chang Su ,  Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen

IPC分类号： G02F1/1343

CPC分类号： G02F1/136286 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2320/0233 ,  G09G2330/021

摘要： An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.

摘要翻译： 有源器件阵列衬底包括衬底，第一扫描线，第二扫描线，数据线和像素。 第一和第二扫描线沿着第一方向交替排列。 数据线沿第二方向平行布置。 像素被布置成形成沿第一方向交替布置的第一像素行和第二像素行。 第一像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第一和第二像素。 第二像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第三和第四像素。 两个相邻数据线之间的像素排列成两列。 在同一列中的像素中，奇数行和偶数行中的像素分别电连接到不同的数据线。

公开(公告)号：US08098792B2

公开(公告)日：2012-01-17

申请号：US12790854

申请日：2010-05-31

申请人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin

发明人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin

IPC分类号： G11C19/00

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2320/043 ,  G11C19/28

摘要： A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

公开(公告)号：US20110158377A1

公开(公告)日：2011-06-30

申请号：US12790854

申请日：2010-05-31

申请人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin

发明人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin

IPC分类号： G11C19/00

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2320/043 ,  G11C19/28

摘要： A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

公开(公告)号：US20110285950A1

公开(公告)日：2011-11-24

申请号：US12858433

申请日：2010-08-17

申请人： Kuo-Chang Su ,  Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen

发明人： Kuo-Chang Su ,  Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen

IPC分类号： G02F1/1343

CPC分类号： G02F1/136286 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2320/0233 ,  G09G2330/021

摘要： An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.

摘要翻译： 有源器件阵列衬底包括衬底，第一扫描线，第二扫描线，数据线和像素。 第一和第二扫描线沿着第一方向交替布置。 数据线沿第二方向平行布置。 像素被布置成形成沿第一方向交替布置的第一像素行和第二像素行。 第一像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第一和第二像素。 第二像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第三和第四像素。 两个相邻数据线之间的像素排列成两列。 在同一列中的像素中，奇数行和偶数行中的像素分别电连接到不同的数据线。

公开(公告)号：US20120140871A1

公开(公告)日：2012-06-07

申请号：US13049863

申请日：2011-03-16

申请人： Yu-Chung Yang ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Kuo-Chang Su

发明人： Yu-Chung Yang ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Kuo-Chang Su

IPC分类号： G11C19/28 ,  G11C19/00

CPC分类号： G09G3/20 ,  G09G3/3674 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/28

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括输入单元，上拉单元，下拉单元，控制单元和辅助下拉单元。 输入单元被用于根据至少一个第一输入信号输出驱动控制电压。 上拉单元根据驱动控制电压和系统时钟提取相应的门信号。 下拉单元根据控制信号将相应的门信号拉低至第一电源电压。 控制单元用于根据相应的门信号产生控制信号。 辅助下拉单元根据第二输入信号将驱动控制电压下拉到第二电源电压。

公开(公告)号：US08396183B2

公开(公告)日：2013-03-12

申请号：US13049863

申请日：2011-03-16

申请人： Yu-Chung Yang ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Kuo-Chang Su

发明人： Yu-Chung Yang ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Kuo-Chang Su

IPC分类号： G11C19/00

CPC分类号： G09G3/20 ,  G09G3/3674 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/28

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括输入单元，上拉单元，下拉单元，控制单元和辅助下拉单元。 输入单元被用于根据至少一个第一输入信号输出驱动控制电压。 上拉单元根据驱动控制电压和系统时钟提取相应的门信号。 下拉单元根据控制信号将相应的门信号拉低至第一电源电压。 控制单元用于根据相应的门信号产生控制信号。 辅助下拉单元根据第二输入信号将驱动控制电压下拉到第二电源电压。