公开(公告)号：US20150022842A1

公开(公告)日：2015-01-22

申请号：US14509593

申请日：2014-10-08

申请人： Kurt F. Busch ,  David Lloyd Wagstaff

发明人： Kurt F. Busch ,  David Lloyd Wagstaff

IPC分类号： G06F3/12 ,  G06K15/02

CPC分类号： G06F3/122 ,  G06F3/1206 ,  G06F3/1225 ,  G06F3/1228 ,  G06F3/1247 ,  G06F3/1287 ,  G06F3/1288 ,  G06F3/1292 ,  G06F3/1298 ,  G06K15/1813 ,  G06K15/1814

摘要： Systems and methods for a print server are provided that includes a processor and a memory coupled to the processor. The memory including instructions causing the processor to receive data from a computing device in a format native to the computing device and process the data received from the computing device into a format native to a printing device connected to the print server. The instructions further cause the system to provide control signals to the print device and provide the data to the print device in the format native to a printer connected to the print server.

摘要翻译： 提供了一种用于打印服务器的系统和方法，其包括处理器和耦合到处理器的存储器。 存储器包括使得处理器以计算设备本地的格式从计算设备接收数据并将从计算设备接收的数据处理成连接到打印服务器的打印设备的原始格式的指令。 该指令还使得系统向打印设备提供控制信号，并以连接到打印服务器的打印机的原始格式向打印设备提供数据。

公开(公告)号：US20210224078A1

公开(公告)日：2021-07-22

申请号：US17151152

申请日：2021-01-16

申请人： Kurt F. Busch ,  Jeremiah H. Holleman, III ,  Pieter Vorenkamp ,  Stephen W. Bailey ,  David Christopher Garrett

发明人： Kurt F. Busch ,  Jeremiah H. Holleman, III ,  Pieter Vorenkamp ,  Stephen W. Bailey ,  David Christopher Garrett

IPC分类号： G06F9/4401 ,  G06F16/22 ,  G06N3/08 ,  G06N3/04

摘要： Provided herein is an integrated circuit including, in some embodiments, a host processor, a digitally implemented neural network co-processor, and a communications interface between the host processor and the co-processor configured to transmit information therebetween. The special-purpose host processor can be operable as a stand-alone processor. The neural network co-processor may include a digitally implemented neural network. The co-processor is configured to enhance special-purpose processing of the host processor through an artificial neural network. In such embodiments, the host processor is wake keyword identifier processor configured to transmit one or more detected patterns to the co-processor over a communications interface. The co-processor is configured to transmit the recognized patterns to the host processor which can then identify and verify wake keywords spoken by a known user.

公开(公告)号：US20210224649A1

公开(公告)日：2021-07-22

申请号：US17151132

申请日：2021-01-16

申请人： Kurt F. Busch ,  Jeremiah H. Hollemen ,  Pieter Vorenkamp ,  Stephen W. Bailey ,  David Christopher Garrett

发明人： Kurt F. Busch ,  Jeremiah H. Hollemen ,  Pieter Vorenkamp ,  Stephen W. Bailey ,  David Christopher Garrett

IPC分类号： G06N3/08 ,  G06N3/04

摘要： Provided herein is an integrated circuit for generating augmented training data, including a host processor configured to receive a signal stream. The integrated circuit also has a co-processor commutatively coupled to the host-processor includes a neural network with at least a first set of weights configured to identify one or more target signals from the signal stream received from the host processor. A plurality of augmentation tools are also accessible to the integrated circuit. Finally, the integrated circuit, coupled computing device or other suitable digital signal processor stores a plurality of the one or more identified target signals, and upon reaching a predetermined threshold of identified target signals, utilizes the plurality of augmentation tools to generate an extended set of target signals, and generates a second set of weights for the neural network based on the extended set of target signals generated by the augmentation tools.