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1.发明申请Content addressable memory cell and content addressable memory using phase change memory 失效内容可寻址存储单元和内容可寻址存储器，使用相变存储器公开(公告)号：US20080068872A1
公开(公告)日：2008-03-20
申请号：US11892851
申请日：2007-08-28
Applicant: Kwang-Jin LEE , Du-eung KIM
Inventor： Kwang-Jin LEE , Du-eung KIM
IPC: G11C15/00
CPC classification number: G11C15/046 , G11C13/0004
Abstract: According to an example embodiment, a CAM cell included in a CAM may include a phase change memory device, a connector, and/or a developer. The phase change memory device may be configured to store data. The phase change memory device may have a resistance that may be varied according to the logic level of the stored data. The connector may be configured to control writing data to the phase change memory device and reading data from the phase change memory device. The developer may be configured to control reading data from the phase change memory device in a search mode in which the data stored in the phase change memory device is compared to the search data.
Abstract translation: 根据示例实施例，CAM中包括的CAM单元可以包括相变存储器件，连接器和/或显影器。 相变存储器件可以被配置为存储数据。 相变存储器件可以具有可以根据存储的数据的逻辑电平而改变的电阻。 连接器可以被配置为控制向相变存储器件写入数据并从相变存储器件读取数据。 开发者可以被配置为在存储在相变存储器件中的数据与搜索数据进行比较的搜索模式中控制从相变存储器件读取数据。
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2.发明申请公开(公告)号：US20080055971A1
公开(公告)日：2008-03-06
申请号：US11834845
申请日：2007-08-07
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
IPC: G11C11/00
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
Abstract: A method of operating a phase change random access memory (PRAM) device comprises performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract translation: 一种操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选择的PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
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3.发明申请公开(公告)号：US20110213922A1
公开(公告)日：2011-09-01
申请号：US13108143
申请日：2011-05-16
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
IPC: G06F12/02
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
Abstract: A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract translation: 操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
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公开(公告)号：US20100165729A1
公开(公告)日：2010-07-01
申请号：US12720918
申请日：2010-03-10
Applicant: Kwang-jin LEE , Choong-keun KWAK , Du-eung KIM
Inventor： Kwang-jin LEE , Choong-keun KWAK , Du-eung KIM
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0064
Abstract: In a nonvolatile memory device, a program operation is performed on a plurality of nonvolatile memory cells by programming data having a first logic state in a first group among a plurality of selected memory cells selected from the plurality of nonvolatile memory cells during a first program interval of the program operation, and thereafter, programming data having a second logic state different from the first logic state in a second group among the selected memory cells during a second program interval of the program operation after the first program interval.
Abstract translation: 在非易失性存储器件中，通过在第一程序间隔期间从多个非易失性存储单元中选出的多个选择的存储单元中的第一组中编程具有第一逻辑状态的数据，对多个非易失性存储单元执行编程操作 并且此后，在所述第一编程间隔之后的所述程序操作的第二编程间隔期间，在所选择的存储单元之间具有与所述第二组中的第一逻辑状态不同的第二逻辑状态的编程数据。
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公开(公告)号：US20080056023A1
公开(公告)日：2008-03-06
申请号：US11834843
申请日：2007-08-07
Applicant: Kwang-jin LEE , Choong-keun KWAK , Du-eung KIM
Inventor： Kwang-jin LEE , Choong-keun KWAK , Du-eung KIM
IPC: G11C7/00
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0064
Abstract: In a nonvolatile memory device, a program operation is performed on a plurality of nonvolatile memory cells by programming data having a first logic state in a first group among a plurality of selected memory cells selected from the plurality of nonvolatile memory cells during a first program interval of the program operation, and thereafter, programming data having a second logic state different from the first logic state in a second group among the selected memory cells during a second program interval of the program operation after the first program interval.
Abstract translation: 在非易失性存储器件中，通过在第一程序间隔期间从多个非易失性存储单元中选出的多个选择的存储单元中的第一组中编程具有第一逻辑状态的数据，对多个非易失性存储单元执行编程操作 并且此后，在所述第一编程间隔之后的所述程序操作的第二编程间隔期间，在所选择的存储单元之间具有与所述第二组中的第一逻辑状态不同的第二逻辑状态的编程数据。
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Patent Agency Ranking
6.发明申请公开(公告)号：US20130039124A1
公开(公告)日：2013-02-14
申请号：US13655666
申请日：2012-10-19
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
IPC: G11C11/00
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
Abstract: A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract translation: 操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
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7.发明申请公开(公告)号：US20100220521A1
公开(公告)日：2010-09-02
申请号：US12724679
申请日：2010-03-16
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
Abstract: A method of operating a phase change random access memory (PRAM) device comprises performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract translation: 一种操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选择的PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
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公开(公告)号：US20080106930A1
公开(公告)日：2008-05-08
申请号：US11933536
申请日：2007-11-01
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM , Woo-yeong CHO , Chang-han CHOI , Ki-won LIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM , Woo-yeong CHO , Chang-han CHOI , Ki-won LIM
CPC classification number: G11C8/06 , G11C8/10 , G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C29/12005 , G11C29/50 , G11C2013/0083 , G11C2013/0092
Abstract: A PRAM includes a memory cell array of phase change memory cells, and a write circuit receiving an externally provided first voltage and supplying a write pulse for writing data to the memory cells in a normal operation mode. The write circuit also receives an externally provided second voltage higher than the first voltage and supplies a firing pulse to at least one firing-failed phase change memory cell.
Abstract translation: PRAM包括相变存储单元的存储单元阵列和接收外部提供的第一电压的写入电路，并且在正常操作模式中提供用于将数据写入存储单元的写入脉冲。 写入电路还接收高于第一电压的外部提供的第二电压，并且向至少一个点火故障相变存储单元提供点火脉冲。
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公开(公告)号：US20080106924A1
公开(公告)日：2008-05-08
申请号：US11844511
申请日：2007-08-24
Applicant: Woo-yeong CHO , Du-eung KIM , Sang-beom KANG
Inventor： Woo-yeong CHO , Du-eung KIM , Sang-beom KANG
IPC: G11C11/00
CPC classification number: G11C8/14 , G11C13/00 , G11C13/0023 , G11C13/0028 , G11C13/0069 , G11C2213/79
Abstract: A resistive memory device is provided. The resistive memory device includes word lines arranged in M rows, bit lines arranged in N columns, local source lines arranged in M/2 rows, and resistive memory cells arranged in M rows and N columns. Each of the resistive memory cells includes a resistance variable element having a first electrode connected to a corresponding bit line, and a cell transistor having a first terminal connected to a second electrode of the resistance variable element, a second terminal connected to a corresponding local source line, and a control terminal connected to a corresponding word line. The local source line is commonly connected to the second terminals of the cell transistors of the two neighboring rows.
Abstract translation: 提供了一种电阻式存储器件。 电阻式存储装置包括排列成M行的字线，以N列排列的位线，以M / 2行排列的局部源极线以及布置成M行N列的电阻存储单元。 每个电阻存储单元包括电阻可变元件，电阻可变元件具有连接到对应的位线的第一电极，以及单元晶体管，其具有连接到电阻可变元件的第二电极的第一端子，连接到相应的本地源极的第二端子 线路和连接到相应字线的控制终端。 本地源极线通常连接到两个相邻行的单元晶体管的第二端子。
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10.发明申请METHOD OF DRIVING MULTI-LEVEL VARIABLE RESISTIVE MEMORY DEVICE AND MULTI-LEVEL VARIABLE RESISTIVE MEMORY DEVICE 有权驱动多级可变电阻记忆装置和多级可变电阻记忆装置的方法公开(公告)号：US20080123389A1
公开(公告)日：2008-05-29
申请号：US11855525
申请日：2007-09-14
Applicant: Woo-yeong CHO , Du-eung KIM , Ki-sung KIM
Inventor： Woo-yeong CHO , Du-eung KIM , Ki-sung KIM
IPC: G11C7/22
CPC classification number: G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C2013/0078
Abstract: Disclosed is a method of driving a multi-level variable resistive memory device. A method of driving a multi-level variable resistive memory device includes supplying a write current to a variable resistive memory cell so as to change resistance of the variable resistive memory cell, verifying whether or not changed resistance enters a predetermined resistance window, and supplying a write current having an increased or decreased amount from the write current supplied most recently on the basis of the verification result so as to change resistance of the variable resistive memory cell.
Abstract translation: 公开了一种驱动多电平可变电阻存储器件的方法。 一种驱动多电平可变电阻存储器件的方法包括向可变电阻存储单元提供写入电流，以便改变可变电阻存储单元的电阻，验证改变电阻是否进入预定电阻窗， 基于验证结果从最近提供的写入电流中增加或减少量的写入电流，以便改变可变电阻存储单元的电阻。
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