Abstract:
There is provided a temperature detecting apparatus for improving operational characteristics, which vary according to the temperature, of elements in a semiconductor memory device. The temperature detecting apparatus of the present invention includes: a first oscillator that outputs a first oscillating signal in response to a first oscillator reset signal, the first oscillating signal being independent of the temperature; a second oscillator that outputs a second oscillating signal in response to a second oscillator enable signal, the second oscillating signal being dependent on the temperature; a comparator that compares an output pulse of the first oscillator with an output pulse of the second oscillator and then outputs a temperature detection comparison signal; and an output unit that outputs a temperature detection signal in response to an input of the temperature detection comparison signals.
Abstract:
The present invention provides a self-refresh period adaptable for testing cells that are weak against hot temperature stress. An apparatus for controlling a self-refresh operation in a semiconductor memory device includes a first period selector for generating one of a period-fixed pulse signal having a constant period and a period-variable pulse signal having a variable period based on a temperature of the semiconductor memory device in a test mode; and a self-refresh block for performing the self-refresh operation in response to an output of the first period selector.
Abstract:
A circuit for outputting data of a semiconductor memory apparatus is provided. A circuit for outputting data of a semiconductor memory apparatus according to an embodiment of the present invention includes a data clock generating unit that generates a data clock, a delayed clock generating unit that receives the data clock and outputs a delayed clock according to a change in an external voltage level, and a clock synchronizing unit that outputs data synchronized with the delayed clock as output data.
Abstract:
A circuit for outputting data of a semiconductor memory apparatus is provided. A circuit for outputting data of a semiconductor memory apparatus according to an embodiment of the present invention includes a data clock generating unit that generates a data clock, a delayed clock generating unit that receives the data clock and outputs a delayed clock according to a change in an external voltage level, and a clock synchronizing unit that outputs data synchronized with the delayed clock as output data.
Abstract:
An apparatus for detecting a refresh period of a semiconductor memory includes a signal generating unit that generates a plurality of signal pairs, each of which includes one among a plurality of first reference signals that are respectively generated with the same timing as first to (N−1)-th pulses of a refresh period signal of order N, and one among a plurality of second reference signals that correspond to the plurality of first reference signals and are respectively generated with the same timing as second to N-th pulses of the refresh period signal. A refresh period detecting unit detects the period of the refresh period signal using one among the plurality of signal pairs.
Abstract:
An apparatus for detecting a refresh period of a semiconductor memory includes a signal generating unit that generates a plurality of signal pairs, each of which includes one among a plurality of first reference signals that are respectively generated with the same timing as first to (N−1)-th pulses of a refresh period signal of order N, and one among a plurality of second reference signals that correspond to the plurality of first reference signals and are respectively generated with the same timing as second to N-th pulses of the refresh period signal. A refresh period detecting unit detects the period of the refresh period signal using one among the plurality of signal pairs.
Abstract:
The present invention provides a self-refresh period adaptable for testing cells that are weak against hot temperature stress. An apparatus for controlling a self-refresh operation in a semiconductor memory device includes a first period selector for generating one of a period-fixed pulse signal having a constant period and a period-variable pulse signal having a variable period based on a temperature of the semiconductor memory device in a test mode; and a self-refresh block for performing the self-refresh operation in response to an output of the first period selector.
Abstract:
The present invention provides a self-refresh period adaptable for testing cells that are weak against hot temperature stress. An apparatus for controlling a self-refresh operation in a semiconductor memory device includes a first period selector for generating one of a period-fixed pulse signal having a constant period and a period-variable pulse signal having a variable period based on a temperature of the semiconductor memory device in a test mode; and a self-refresh block for performing the self-refresh operation in response to an output of the first period selector.
Abstract:
The present invention provides a self-refresh period adaptable for testing cells that are weak against hot temperature stress. An apparatus for controlling a self-refresh operation in a semiconductor memory device includes a first period selector for generating one of a period-fixed pulse signal having a constant period and a period-variable pulse signal having a variable period based on a temperature of the semiconductor memory device in a test mode; and a self-refresh block for performing the self-refresh operation in response to an output of the first period selector.