DISPLAY PANEL AND METHOD OF DRIVING THE SAME
    1.
    发明申请
    DISPLAY PANEL AND METHOD OF DRIVING THE SAME 有权
    显示面板及其驱动方法

    公开(公告)号:US20160155409A1

    公开(公告)日:2016-06-02

    申请号:US14953614

    申请日:2015-11-30

    Abstract: A display panel and a method of driving the same are disclosed. The display panel includes a shift register with a plurality of stages configured to shift and to output a scan pulse for a plurality of scan lines. Each stage includes a pull-up transistor and a pull-down transistor coupled in series and defining an output node therebetween, a driver with a first node coupled to a gate electrode of the pull-up transistor and a second node coupled to a gate electrode of the pull-down transistor; and a node controller coupled to the first node, the second node, and the output node. In each stage, the node controller is configured to selectively apply a reference voltage at the first node and the second node in response to a control signal.

    Abstract translation: 公开了一种显示面板及其驱动方法。 显示面板包括具有多个级的移位寄存器,配置为移位并输出多条扫描线的扫描脉冲。 每个级包括串联耦合并在其间限定输出节点的上拉晶体管和下拉晶体管,具有耦合到上拉晶体管的栅电极的第一节点的驱动器和耦合到栅电极的第二节点 的下拉晶体管; 以及耦合到所述第一节点,所述第二节点和所述输出节点的节点控制器。 在每个阶段,节点控制器被配置为响应于控制信号在第一节点和第二节点选择性地施加参考电压。

    GATE SHIFT REGISTER AND DISPLAY DEVICE USING THE SAME
    2.
    发明申请
    GATE SHIFT REGISTER AND DISPLAY DEVICE USING THE SAME 有权
    GATE移位寄存器和使用该寄存器的显示器件

    公开(公告)号:US20140321599A1

    公开(公告)日:2014-10-30

    申请号:US14133243

    申请日:2013-12-18

    CPC classification number: G11C19/28 G09G2310/0286

    Abstract: Provided is a gate shift register including a plurality of stages receiving a plurality of clocks to generate gate output signals, in which an n-th stage of the stages dependently connected to each other includes an output node outputting an n-th gate output signal, a pull-up TFT switching a current flow between an input terminal of a clock having an n-th phase and the output node according to a potential of a Q node, a pull-down TFT switching the current flow between an input terminal of a low potential voltage and the output node according to a potential of a QB node, and a BTS compensation unit periodically discharging the QB node at a low potential level just after the n-th stage is reset and just until the n-th stage is set in a next frame.

    Abstract translation: 提供了一种门移位寄存器,包括多个级接收多个时钟以产生门输出信号,其中相位相互连接的级的第n级包括输出第n门输出信号的输出节点, 上拉TFT根据Q节点的电位切换具有第n相的时钟的输入端和输出节点之间的电流,下拉TFT切换在 低电位电压和输出节点根据QB节点的电位,并且BTS补偿单元在第n级复位之后以低电位周期性地排出QB节点,直到第n级被设置 在下一帧。

Patent Agency Ranking