Gate driver and display device using the same

    公开(公告)号:US11024245B2

    公开(公告)日:2021-06-01

    申请号:US15798004

    申请日:2017-10-30

    Abstract: A gate driver and a display device using the same are disclosed. The gate driver includes a plurality of stages connected in a cascade connection manner, and each of the stages include a clock input configured to receive a shift clock signal, a first output terminal, and a second output terminal. Each of the stages generates a first output voltage that is transmitted to another stage through the first output terminal and a second output voltage that is supplied to a gate line of a display panel through the second output terminal. Each of the stages includes a first diode connected between the clock input and the first output terminal.

    Gate driver and display device using the same

    公开(公告)号:US10210836B2

    公开(公告)日:2019-02-19

    申请号:US15799516

    申请日:2017-10-31

    Abstract: A gate driver and a display device using the same are disclosed. The gate driver includes a first transistor configured to pre-charge a Q node, a second transistor configured to raise the output voltage depending on a voltage of the Q node, a third transistor configured to charge a QB node, a fourth transistor configured to lower the output voltage depending on a voltage of the QB node, and a capacitor connected between a gate and a source in at least one of the second transistor and the third transistor. The capacitor has a capacitance greater than a capacitance between the gate and a drain of the transistor to which the capacitor is connected. The capacitor includes an upper capacitor disposed on an organic passivation layer covering the transistors.

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