公开(公告)号：US20230215377A1

公开(公告)日：2023-07-06

申请号：US18054866

申请日：2022-11-11

Applicant: LG Display Co., Ltd.

Inventor： Ingu HAN ,  HongJae SHIN

IPC: G09G3/3266 ,  G09G3/3233

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2320/0626

Abstract: Embodiments of the present disclosure are related to a gate driving circuit and a display device, by a boot capacitor controlling a voltage level of a Q node at a timing that the gate driving circuit outputs a gate signal of a turn-on level and a pump capacitor controlling the voltage level of the Q node in a period that the gate signal of the turn-on level is output, a level of the gate signal can be maintained stably even in the case that the gate signal of the turn-on level is output in a long time.

公开(公告)号：US20240290276A1

公开(公告)日：2024-08-29

申请号：US18433784

申请日：2024-02-06

Applicant: LG DISPLAY CO., LTD.

Inventor： Ingu HAN ,  SooHong CHOI ,  HongJae SHIN

IPC: G09G3/3266 ,  G09G3/3233 ,  H10K59/126 ,  H10K59/131 ,  H10K59/80

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  H10K59/126 ,  H10K59/131 ,  H10K59/873 ,  G09G2300/0408 ,  G09G2300/0842

Abstract: A display panel and a display device which may remove load deviation between clock signal lines. More specifically, the display device includes a substrate including a display area capable of displaying an image and a non-display area disposed around the display area, the display area including a subpixel and a gate line for driving the subpixel; a gate driving panel circuit disposed in the non-display area and configured to output a gate signal to the gate line; a plurality of clock signal lines disposed in the non-display area and positioned to be farther from the display area than the gate driving panel circuit to supply a plurality of clock signals to the gate driving panel circuit; an overcoat layer disposed on the plurality of clock signal lines and the gate driving panel circuit; and a light emitting element included in the subpixel, comprising a cathode electrode disposed on the overcoat layer and extending from the display area to the non-display area, wherein the cathode electrode is disposed not to overlap the plurality of clock signal lines.

公开(公告)号：US20240290281A1

公开(公告)日：2024-08-29

申请号：US18585822

申请日：2024-02-23

Applicant: LG Display Co., Ltd.

Inventor： Ingu HAN ,  SooHong CHOI ,  HongJae SHIN

IPC: G09G3/3266 ,  G09G3/32 ,  G09G3/3291

CPC classification number: G09G3/3266 ,  G09G3/32 ,  G09G3/3291 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0291

Abstract: Embodiments of the disclosure relate to a display panel and a display device and, specifically, may provide a display panel comprising a display area where a plurality of subpixels are disposed, a gate driving circuit disposed in a non-display area outside the display area to supply a plurality of scan signals to the plurality of subpixels, a plurality of gate high-potential voltage lines which are disposed in a side of the gate driving circuit for transferring a plurality of gate high-potential voltages, a plurality of gate low-potential voltage lines which are disposed in other side of the gate driving circuit for transferring a plurality of gate low-potential voltages, and a plurality of gate low-potential voltage connection lines which are extended through a central area of the gate driving circuit for transferring the plurality of gate low-potential voltages to the gate driving circuit.