公开(公告)号：US20210201816A1

公开(公告)日：2021-07-01

申请号：US17132735

申请日：2020-12-23

Applicant: LG Display Co., Ltd.

Inventor： KwangSoo KIM ,  HongJae SHIN ,  JaeKyu PARK

IPC: G09G3/3266

Abstract: A gate driving circuit and a display apparatus including the same are disclosed, in which a plurality of gate lines may be driven through one stage circuit. The gate driving circuit includes first to mth stage circuits outputting a plurality of scan signals by dividing the scan signals into a first signal group and a second signal group. The first to mth stage circuits are grouped into k number of stage groups having two adjacent stage circuits, stage circuits of jth stage group (j is a natural number of 1 to k−1) output the scan signals of the first signal group to be earlier than the scan signals of the second signal group, and stage circuits of (j+1)th stage group output the scan signals of the second signal group to be earlier than the scan signals of the first signal group.

公开(公告)号：US20170154579A1

公开(公告)日：2017-06-01

申请号：US15205642

申请日：2016-07-08

Applicant: LG DISPLAY CO., LTD.

Inventor： Jaeyi CHOI ,  WooSup SHIN ,  JaeYoung OH ,  HongJae SHIN

IPC: G09G3/3291 ,  H01L27/32

CPC classification number: G09G3/3291 ,  G09G3/3233 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0295 ,  G09G2320/043 ,  G09G2330/04 ,  G09G2330/08 ,  G09G2330/12 ,  H01L27/3276 ,  H01L27/3288 ,  H01L2251/5392

Abstract: Discussed is an organic light-emitting display panel including: an active area corresponding to an image display region; and a non-active area corresponding to a region outside of the active area, wherein the active area includes a plurality of signal lines arranged in an array, wherein the non-active area includes a pad region to which a source driver IC is mounted, and a switching structure, wherein the pad region includes a plurality of pads arranged in correspondence with the array of the signal lines, and wherein the switching structure includes: a common reference voltage pad-connection terminal connected to a common reference voltage pad of the display panel; a plurality of reference voltage line-connection terminals connected to a plurality of reference voltage lines of the display panel; and a switching circuit to switch connections between the common reference voltage pad-connection terminal and the plurality of reference voltage line-connection terminals.

公开(公告)号：US20250014522A1

公开(公告)日：2025-01-09

申请号：US18593260

申请日：2024-03-01

Applicant: LG Display Co., Ltd.

Inventor： Dongmyoung KIM ,  HongJae SHIN ,  YongHo KIM

IPC: G09G3/3266 ,  G09G3/32 ,  H10K59/121

Abstract: A display device and a gate driving panel circuit including the same are discussed. The gate driving panel circuit in an example includes an output buffer block configured to receive a clock signal and output a scan signal, and a logic block configured to control respective voltages of a Q node and a QB node electrically connected to the output buffer block. The output buffer block includes a pull-up transistor disposed between a clock node to which the clock signal is input and an output node to which the scan signal is output, and a pull-down transistor disposed between a gate low voltage node to which a gate low voltage is applied and the output node. A gate node of the pull-up transistor is electrically connected to the Q node.

公开(公告)号：US20230215377A1

公开(公告)日：2023-07-06

申请号：US18054866

申请日：2022-11-11

Applicant: LG Display Co., Ltd.

Inventor： Ingu HAN ,  HongJae SHIN

IPC: G09G3/3266 ,  G09G3/3233

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2320/0626

Abstract: Embodiments of the present disclosure are related to a gate driving circuit and a display device, by a boot capacitor controlling a voltage level of a Q node at a timing that the gate driving circuit outputs a gate signal of a turn-on level and a pump capacitor controlling the voltage level of the Q node in a period that the gate signal of the turn-on level is output, a level of the gate signal can be maintained stably even in the case that the gate signal of the turn-on level is output in a long time.

公开(公告)号：US20210201767A1

公开(公告)日：2021-07-01

申请号：US17129412

申请日：2020-12-21

Applicant: LG Display Co., Ltd.

Inventor： JaeKyu PARK ,  SooHong CHOI ,  HongJae SHIN ,  Seongho YUN ,  Jeongrim SEO

IPC: G09G3/32

Abstract: A gate driving circuit and a light emitting display apparatus comprising the same are discussed, in which a charging characteristic of a control node is improved. The gate driving circuit comprises first to mth stage circuits, wherein each of the first to mth stage circuits includes first to third control nodes, a node control circuit controlling a voltage of each of the first to third control nodes, and an output buffer circuit outputting each of a scan signal, a sense signal and a carry signal in accordance with each of the first to third control nodes, the node control circuit including a node setup circuit charging a first gate high potential voltage in the first control node in response to a first carry signal supplied from a front stage circuit.

公开(公告)号：US20240290284A1

公开(公告)日：2024-08-29

申请号：US18589247

申请日：2024-02-27

Applicant: LG Display Co., Ltd.

Inventor： Min-June JANG ,  MiYoung SON ,  HongJae SHIN

IPC: G09G3/3266 ,  G09G3/32

CPC classification number: G09G3/3266 ,  G09G3/32 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0267 ,  G09G2310/0291

Abstract: Discussed are a display device and a gate driving panel circuit, and characteristic differences between scan signals can be reduced through differential design between scan bootstrapping capacitors included in scan output buffers for outputting scan signals. The gate driving panel circuit includes an output buffer block including two or more scan output buffers and a logic block. The corresponding scan bootstrapping capacitor included in a specific scan output buffer among the two or more scan output buffers has a different capacitance from the one or more corresponding scan bootstrapping capacitors included in one or more remaining scan output buffers, except for the specific scan output buffer among the two or more scan output buffers.

公开(公告)号：US20240290276A1

公开(公告)日：2024-08-29

申请号：US18433784

申请日：2024-02-06

Applicant: LG DISPLAY CO., LTD.

Inventor： Ingu HAN ,  SooHong CHOI ,  HongJae SHIN

IPC: G09G3/3266 ,  G09G3/3233 ,  H10K59/126 ,  H10K59/131 ,  H10K59/80

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  H10K59/126 ,  H10K59/131 ,  H10K59/873 ,  G09G2300/0408 ,  G09G2300/0842

Abstract: A display panel and a display device which may remove load deviation between clock signal lines. More specifically, the display device includes a substrate including a display area capable of displaying an image and a non-display area disposed around the display area, the display area including a subpixel and a gate line for driving the subpixel; a gate driving panel circuit disposed in the non-display area and configured to output a gate signal to the gate line; a plurality of clock signal lines disposed in the non-display area and positioned to be farther from the display area than the gate driving panel circuit to supply a plurality of clock signals to the gate driving panel circuit; an overcoat layer disposed on the plurality of clock signal lines and the gate driving panel circuit; and a light emitting element included in the subpixel, comprising a cathode electrode disposed on the overcoat layer and extending from the display area to the non-display area, wherein the cathode electrode is disposed not to overlap the plurality of clock signal lines.

公开(公告)号：US20240290251A1

公开(公告)日：2024-08-29

申请号：US18442945

申请日：2024-02-15

Applicant: LG Display Co., Ltd.

Inventor： Seongho YUN ,  HongJae SHIN ,  YongHo KIM

IPC: G09G3/32 ,  G09G3/3266

CPC classification number: G09G3/32 ,  G09G3/3266 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/045 ,  G09G2330/021

Abstract: The present disclosure relates to a display panel for gate driving and a display device, which include a gate driving panel circuit and are capable of providing a stable power wiring structure for stably supplying high voltages and low voltages to the gate driving panel circuit disposed in the display panel.

公开(公告)号：US20220208058A1

公开(公告)日：2022-06-30

申请号：US17542583

申请日：2021-12-06

Applicant: LG DISPLAY CO., LTD.

Inventor： Sujin HWANG ,  MiYoung SON ,  EungKyu KIM ,  HongJae SHIN ,  MinKyu CHANG

IPC: G09G3/20

Abstract: A display device includes a level shifter and a gate driving circuit that can reduce differences in characteristics among gate signals to improve image quality by controlling a signal waveform of a first clock signal of the m number of clock signals different from a signal waveform of an m-th clock signal when m number of gate signals is output by using m number of clock signals.

公开(公告)号：US20240290285A1

公开(公告)日：2024-08-29

申请号：US18590630

申请日：2024-02-28

Applicant: LG Display Co., Ltd.

Inventor： Hoon CHOI ,  HongJae SHIN ,  YongHo KIM

IPC: G09G3/3266 ,  G09G3/32 ,  G09G3/3291 ,  G09G3/36

CPC classification number: G09G3/3266 ,  G09G3/32 ,  G09G3/3291 ,  G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2330/08

Abstract: A gate driving panel circuit and a display device are discussed. The gate driving circuit in an example includes n gate driving panel circuits configured to output two or more gate signals where, n is a natural number equal to or larger than 2, a start dummy gate driving panel circuit configured to generate a first feedback voltage and transfer a start carry signal to a first gate driving panel circuit among the plurality of gate driving panel circuits, and an end dummy gate driving panel circuit configured to generate a second feedback voltage and transferring an end carry signal to an nth gate driving panel circuit.