-
公开(公告)号:US11308872B2
公开(公告)日:2022-04-19
申请号:US16174721
申请日:2018-10-30
Applicant: LG Display Co., Ltd.
Inventor: Kyung-Min Kim , In-Hyo Han , Hun-Ki Shin
IPC: G09G3/30 , G09G3/3225 , H03K3/027 , H01L27/32 , G09G3/3266 , G09G3/3233
Abstract: The present disclosure relates to an OLED display panel for minimizing the size of a bezel and includes: an active area including data lines, scan lines intersecting the data lines, and sub-pixels arranged at each intersection; and a stage of a GIP driving circuit distributed and arranged in a plurality of unit pixel regions driven by m (m being a natural number) scan lines in the active area, to supply scan pulses to the corresponding scan lines, wherein the active area further includes m GIP internal connection lines parts respectively adjacent to the m scan lines, and a plurality of internal connection lines for connecting elements constituting each stage is distributed and arranged in the m GIP internal connection line parts.
-
公开(公告)号:US11282428B2
公开(公告)日:2022-03-22
申请号:US17013191
申请日:2020-09-04
Applicant: LG Display Co., Ltd.
Inventor: In-Hyo Han , Ki-Min Son , Kil-Hwan Oh , Hae-Jin Park , Kyung-Min Kim
IPC: G09G3/20 , H01L27/32 , G09G3/3266 , G09G3/3275 , G09G3/3233 , H01L51/52 , H01L27/02 , G09G3/3225 , H01L27/12
Abstract: The display panel includes an active region including data lines, gate lines crossing the data lines, and pixels arranged in a matrix, and a shift register arranged distributively in the active region and configured to supply a gate pulse to the gate lines.
-
公开(公告)号:US10692439B2
公开(公告)日:2020-06-23
申请号:US16153646
申请日:2018-10-05
Applicant: LG Display Co., Ltd.
Inventor: Kyung-Min Kim , In-Hyo Han
IPC: G09G3/32 , G09G3/3266 , H01L27/32
Abstract: The present disclosure relates to an OLED display panel and an OLED display device in which a GIP driving circuit is arranged in an active area in order to minimize a bezel size and a GIP signal is applied to the GIP driving circuit arranged in the active area using a single-sided COF, and the OLED display panel includes: an active area including data lines, scan lines intersecting the data lines, and sub-pixels arranged at each intersection; stages of a GIP driving circuit distributed and arranged in a plurality of unit pixel regions corresponding to the scan lines in the active area to supply scan pulses to the scan lines; and a non-active area including a pad part, a link part and a LOG part, wherein the pad part includes a gate pad part for supplying various control signals to the stages of the GIP driving circuit, and a data pad part for supplying a data voltage to each data line, and wherein the non-active area includes a plurality of signal lines extended from the gate pad part via the link part to the LOG part in order to supply various control signals to the GIP parts is arranged.
-
公开(公告)号:US10546539B2
公开(公告)日:2020-01-28
申请号:US16116551
申请日:2018-08-29
Applicant: LG Display Co., Ltd.
Inventor: Kyung-Min Kim , In-Hyo Han , Seok Noh
IPC: G09G3/30 , G09G3/3266 , G09G3/3291 , H01L27/32
Abstract: Disclosed herein is an organic light emitting diode (OLED) display device including an OLED display panel including a non-active area and an active area, having a plurality of gate lines and a plurality of data lines disposed in the active area, and having a plurality of subpixels arranged at intersections between the gate lines and the data lines in a matrix, a gate driver disposed in the non-active area of the OLED display panel to supply a scan pulse to the plurality of gate lines, and a bootstrap capacitor for preventing output loss of the scan pulses of the gate driver in the active area of the OLED display panel.
-
公开(公告)号:US10957755B2
公开(公告)日:2021-03-23
申请号:US15809806
申请日:2017-11-10
Applicant: LG Display Co., Ltd.
Inventor: In-Hyo Han , Ki-Min Son , Kil-Hwan Oh , Hae-Jin Park , Kyung-Min Kim
IPC: G09G5/10 , H01L27/32 , G09G3/3266 , G09G3/3275 , G09G3/3233 , H01L51/52 , H01L27/02 , G09G3/3225 , G09G3/20 , H01L27/12
Abstract: A display panel and an OLED display device using the same are disclosed. The display panel includes an active region including data lines, gate lines crossing the data lines, and pixels arranged in a matrix, and a shift register arranged distributively in the active region and configured to supply a gate pulse to the gate lines.
-
-
-
-