公开(公告)号：US20230008511A1

公开(公告)日：2023-01-12

申请号：US17859852

申请日：2022-07-07

Applicant: LG Display Co., Ltd.

Inventor： Ki Won SON ,  Seok NOH ,  Ki Min SON ,  Seo Jun YEOM

IPC: G09G3/3266 ,  G09G3/3291 ,  G09G3/3233

Abstract: A gate driver according to an embodiment and a display device using the same are discussed. The gate driver can output a gate signal to a pixel circuit having a driving element connected between a first power line and a first node, a light-emitting element connected between the first node and a second power line, and a switching element connected between the first node and a third power line and driven by the gate signal. The gate driver includes a first circuit unit to receive a carry signal from a previous signal transmission unit to charge or discharge a first control node and a second control node, and a second circuit unit having a first buffer transistor and a second buffer transistor configured to output the gate signal based on a first clock signal and a first low potential voltage according to potentials of the first and second control nodes.

公开(公告)号：US20230094280A1

公开(公告)日：2023-03-30

申请号：US17952040

申请日：2022-09-23

Applicant: LG DISPLAY CO., LTD.

Inventor： Yong Won LEE ,  Ki Young KWON ,  Seo Jun YEOM

IPC: G09G3/3258 ,  G09G3/3266

Abstract: A pixel circuit includes: a driving element including a first electrode connected to a first node to which a pixel driving voltage is applied, a gate electrode connected to a second node, and a second electrode connected to a third node; a light emitting element including an anode electrode connected to the third node, and a cathode electrode connected to a power line; a first switch element to supply a data voltage of pixel data to the second node; a second switch element to supply an initialization voltage to the second node; a third switch element to supply a reference voltage to the third node; a fourth switch element configured to connect the third node to a power line to reset a voltage of the anode electrode of the light emitting element to the pixel reference voltage; and a capacitor between the second and third node.