公开(公告)号：US20230008552A1

公开(公告)日：2023-01-12

申请号：US17855152

申请日：2022-06-30

Applicant: LG Display Co., Ltd.

Inventor： Chang Hee KIM ,  Ki Min SON

IPC: G09G3/3233 ,  G09G3/3291

Abstract: A pixel circuit and a display panel including the same are disclosed. The pixel circuit may include a driving element including a gate connected to a first node to which a data voltage is configured to be applied, a first electrode connected to a high-potential voltage line, and a second electrode connected to a second node; a first switch element connected between the second node and a third node; a second switch element connected between the second node and a fourth node; a third switch element connected between the fourth node and a reference voltage line; a first capacitor connected between the first node and the third node; and a second capacitor connected between the third node and the fourth node.

公开(公告)号：US20240169919A1

公开(公告)日：2024-05-23

申请号：US18477396

申请日：2023-09-28

Applicant: LG Display Co., Ltd.

Inventor： Ki Min SON ,  Chang Hee KIM

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0443

Abstract: A pixel circuit and a display panel including the same are disclosed. The display panel includes: an individual switch element configured to supply a pixel driving voltage to a first sub-pixel in response to a gate signal; and a shared switch element configured to supply the pixel driving voltage to second and third sub-pixels in response to the gate signal. Each of the individual switch element and the shared switch element is a transistor having a channel width. The channel width of the shared switch element is larger than the channel width of the individual switch element.

公开(公告)号：US20240013720A1

公开(公告)日：2024-01-11

申请号：US18369257

申请日：2023-09-18

Applicant: LG DISPLAY CO., LTD.

Inventor： Ki Min SON ,  Chang Hee KIM

IPC: G09G3/3233 ,  G09G3/3283 ,  G09G3/3266

CPC classification number: G09G3/3233 ,  G09G3/3283 ,  G09G3/3266 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2320/0233 ,  G09G2300/0426 ,  G09G2300/0861 ,  G09G2310/0297 ,  G09G2310/08

Abstract: A pixel circuit of a display device includes a driving element comprising a first electrode connected to a first node to which a pixel driving voltage is applied, a first gate electrode connected to a second node, a second electrode connected to a third node, and a second gate electrode connected to a fourth node, and configured to supply an electric current to a light-emitting element; a first switch element configured to be turned on according to a gate-on voltage and supply a data voltage to the second node; a first capacitor connected between the second node and the third node; a second capacitor connected between the third node and the fourth node; and a third capacitor connected between the fourth node and the first node, or between the fourth node and a power line to which the pixel driving voltage is applied.

公开(公告)号：US20230009494A1

公开(公告)日：2023-01-12

申请号：US17860085

申请日：2022-07-07

Applicant: LG Display Co., Ltd.

Inventor： Seok NOH ,  Ki Min SON

IPC: G09G3/3266 ,  G09G3/3233

Abstract: Disclosed are a gate driver and a display panel including the same. The gate driver according to an embodiment includes a plurality of signal transfer units cascade-connected via a carry line to which a carry signal is applied from a previous signal transfer unit, and an nth (n is a positive integer) signal transfer unit includes a first output unit configured to output a first gate signal to a first output node according to a voltage of a first control node configured to pull up an output voltage and a second control node configured to pull down the output voltage; and a second output unit configured to output a second gate signal in which a phase of the first gate signal is reversed to a second output node, wherein the second output unit may include a first pull-up transistor configured to output a high potential voltage to the second output node according to a voltage of a second control node of an (n-i)th (i is a positive integer less than n) signal transfer unit; and a second pull-down transistor configured to output a first low potential voltage to the second output node according to a voltage of a first control node of an (n+j)th (j is a natural number greater than n) signal transfer unit.

公开(公告)号：US20230071094A1

公开(公告)日：2023-03-09

申请号：US17901516

申请日：2022-09-01

Applicant: LG Display Co., Ltd.

Inventor： Ki Min SON ,  Seok NOH ,  Ki Bok PARK ,  Ye Won HONG

IPC: H01L27/32 ,  G11C19/28 ,  G09G3/20 ,  G09G3/3266

Abstract: A display panel and an electronic device including the same are disclosed. A circuit layer of the display panel includes at least a first transistor and a second transistor. The first transistor includes a first oxide semiconductor pattern, a gate electrode, a first electrode in contact with one side of the first oxide semiconductor pattern, a second electrode in contact with the other side of the first oxide semiconductor pattern, and a first-first metal pattern disposed on the substrate to overlap the first oxide semiconductor pattern. The second transistor includes a second oxide semiconductor pattern, a gate electrode, a first electrode in contact with one side of the second oxide semiconductor pattern, a second electrode in contact with the other side of the second oxide semiconductor pattern, a first-second metal pattern disposed on the substrate to overlap the second oxide semiconductor pattern, and a second metal pattern disposed between the second oxide semiconductor pattern and the first-second metal pattern.

公开(公告)号：US20230009113A1

公开(公告)日：2023-01-12

申请号：US17852906

申请日：2022-06-29

Applicant: LG DISPLAY CO., LTD.

Inventor： Ki Min SON ,  Chang Hee KIM

IPC: G09G3/3233 ,  G09G3/3283 ,  G09G3/3266

Abstract: A pixel circuit of a display device includes a driving element comprising a first electrode connected to a first node to which a pixel driving voltage is applied, a first gate electrode connected to a second node, a second electrode connected to a third node, and a second gate electrode connected to a fourth node, and configured to supply an electric current to a light-emitting element; a first switch element configured to be turned on according to a gate-on voltage and supply a data voltage to the second node; a first capacitor connected between the second node and the third node; a second capacitor connected between the third node and the fourth node; and a third capacitor connected between the fourth node and the first node, or between the fourth node and a power line to which the pixel driving voltage is applied.

公开(公告)号：US20230008896A1

公开(公告)日：2023-01-12

申请号：US17859947

申请日：2022-07-07

Applicant: LG Display Co., Ltd.

Inventor： Seok NOH ,  Ki Min SON

IPC: G09G3/3266 ,  G09G3/3233

Abstract: An inverter circuit, a gate driver using the same, and a display device according to an embodiment are discussed. The inverter circuit can include a first transistor connected between a high potential voltage line and a first node; a second transistor having a gate connected to the first node and turned on according to a voltage of the first node to charge a second control node to a high potential voltage of the high potential voltage line; a third transistor having a gate connected to a first control node, a first electrode connected to the first node, and a second electrode connected to the second control node; and a fourth transistor having a gate connected to the first control node, a first electrode connected to the second control node, and a second electrode connected to a low potential voltage line.

公开(公告)号：US20240105122A1

公开(公告)日：2024-03-28

申请号：US18531453

申请日：2023-12-06

Applicant: LG Display Co., Ltd.

Inventor： Ki Min SON ,  Chang Hee KIM ,  Seok NOH

IPC: G09G3/3233 ,  G09G3/3266

CPC classification number: G09G3/3233 ,  G09G3/3266 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2320/0233 ,  G09G2320/0247 ,  G09G2330/021

Abstract: A pixel circuit comprises a first switch element comprising a first electrode to which an initialization voltage is applied, a gate electrode to which a initialization pulse is applied, and a second electrode connected to a second node; a second switch element comprising a first electrode connected to a third node or a fourth node, a gate electrode to which a sensing pulse is applied, and a second electrode to which a reference voltage is applied; a third switch element comprising a first electrode to which a data voltage is applied, a gate electrode to which a scan pulse is applied, and a second electrode connected to the second node; and a fourth switch element comprising a first electrode connected to the third node, a gate electrode to which a first emission control pulse is applied, and a second electrode connected to the fourth node.

公开(公告)号：US20230070020A1

公开(公告)日：2023-03-09

申请号：US17899548

申请日：2022-08-30

Applicant: LG Display Co., Ltd.

Inventor： Ki Min SON ,  Chang Hee KIM

IPC: G09G3/3258 ,  G09G3/3291 ,  G09G3/3266

Abstract: A pixel circuit and a display device including the same are disclosed. The pixel circuit of the present disclosure includes: a driving element including a first electrode connected to a first node to which a pixel driving voltage is applied, a gate electrode connected to a second node, and a second electrode connected to a third node; a first switch element configured to supply a data voltage of pixel data to a fourth node in response to a scan pulse; a second switch element configured to supply an initialization voltage to the second node in response to a first initialization pulse; a third switch element configured to supply a reference voltage lower than the initialization voltage to the third node in response to a sensing pulse; and a fourth switch element configured to supply the reference voltage to the fourth node in response to a second initialization pulse.

公开(公告)号：US20230010792A1

公开(公告)日：2023-01-12

申请号：US17848175

申请日：2022-06-23

Applicant: LG DISPLAY CO., LTD.

Inventor： Seung Ho HEO ,  Dong Hyun LEE ,  Seok NOH ,  Ki Min SON ,  Hun Ki SHIN

IPC: G09G3/3266 ,  G09G3/3233

Abstract: Provided are a gate driving circuit and a display device including the same. The gate driving circuit includes a first controller configured to control a first control node to act as a pull-up control node to turn on a first transistor when an activation clock is input to the first controller for a first unit time, and to be deactivated when a deactivation clock is input thereto for a second unit time; and a second controller configured to control a second control node to act as a pull-up control node to turn on a second transistor when the activation clock is input to the second controller for the second unit time, and to be deactivated when the deactivation clock is input thereto for the first unit time.