公开(公告)号：US20230215381A1

公开(公告)日：2023-07-06

申请号：US18147216

申请日：2022-12-28

Applicant: LG Display Co., Ltd.

Inventor： Soonsung AHN ,  Chungwan OH ,  Minsoo PARK

IPC: G09G3/3266 ,  G09G3/3275 ,  G11C19/28

CPC classification number: G09G3/3266 ,  G09G3/3275 ,  G11C19/28 ,  G09G2310/08 ,  G09G2310/0286 ,  G09G2310/0278

Abstract: The disclosure relates to a display panel, a display device, and a gate driver circuit. According to an embodiment, a display panel includes a gate driver circuit in which when a display device operates at low-speed for a long time, a voltage of a Q node between an input and an output of a gate shift register in a gate driver circuit does not rise but is maintained at a value below a certain voltage. Here, potential maintaining circuit (PMC) is connected to a Q node, a Q2 node, or a vulnerable node between an input unit and an output unit of the gate shift register. The PMC maintains a potential of the Q node at a value below a selected level during a light-emitting operation for display. Thus, image quality defect due to damage to output voltage resulting from leakage and noise at an output node is prevented.

公开(公告)号：US20230206852A1

公开(公告)日：2023-06-29

申请号：US17966584

申请日：2022-10-14

Applicant: LG Display Co., Ltd.

Inventor： Taehwi KIM ,  Soonsung AHN

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2300/0852 ,  G09G2310/08

Abstract: A display device is disclosed by the present disclosure. The display device includes: a display panel having a plurality of sub-pixels, the sub-pixels being connected to a plurality of scan lines and a plurality of data lines; and a gate driver for supplying a scan signal at a high level to the plurality of scan lines. The gate driver may include: a first gate driver for outputting a carry signal at a low level; a second gate driver for outputting the scan signal at the high level based on the carry signal; a first clock signal line connected to the first and the second gate driver; and a second clock signal line connected to the first and the second gate driver. Accordingly, the gate driver can generate a high-level scan signal based on the low-level carry signal from the first gate driver.

公开(公告)号：US20240177677A1

公开(公告)日：2024-05-30

申请号：US18433102

申请日：2024-02-05

Applicant: LG Display Co., Ltd.

Inventor： Taehwi KIM ,  Soonsung AHN

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2300/0852 ,  G09G2310/08

Abstract: A display device is disclosed by the present disclosure. The display device includes: a display panel having a plurality of sub-pixels, the sub-pixels being connected to a plurality of scan lines and a plurality of data lines; and a gate driver for supplying a scan signal at a high level to the plurality of scan lines. The gate driver may include: a first gate driver for outputting a carry signal at a low level; a second gate driver for outputting the scan signal at the high level based on the carry signal; a first clock signal line connected to the first and the second gate driver; and a second clock signal line connected to the first and the second gate driver. Accordingly, the gate driver can generate a high-level scan signal based on the low-level carry signal from the first gate driver.

公开(公告)号：US20240292689A1

公开(公告)日：2024-08-29

申请号：US18441834

申请日：2024-02-14

Applicant: LG Display Co., Ltd.

Inventor： Soonsung AHN ,  SeHwan NA ,  Taehwi KIM ,  JinHo LIM ,  Jaesung KIM

IPC: H10K59/131 ,  H10K59/121

CPC classification number: H10K59/131 ,  H10K59/1213

Abstract: A display device and a display panel are discussed. In one example, the display device includes a data driving circuit to supply a plurality of data voltages to a plurality of data lines, wherein the plurality of data lines comprise first data lines and second data lines; a gate driving circuit to supply a plurality of gate signals to a plurality of gate lines; and a display panel having the first data lines disposed in a first area corresponding to the data driving circuit, and the second data lines disposed in a second area located outside of the first area. Further, the display panel can include first data link lines for connecting the first data lines to the data driving circuit, and second data link lines with connecting paths arranged in a stepped line configuration for connecting the second data lines to the data driving circuit.