公开(公告)号：US11887548B2

公开(公告)日：2024-01-30

申请号：US17952417

申请日：2022-09-26

Applicant: LG DISPLAY CO., LTD.

Inventor： Ye Won Hong

IPC: G09G3/3266 ,  G09G3/3233 ,  G09G3/3275

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G3/3275 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2320/043 ,  G09G2330/021

Abstract: A gate driver includes signal transmission units cascade-connected via a carry line to which a carry signal is applied from a previous signal transmission unit. An nth signal transmission unit includes: a first circuit including a first Q logic generator to receive the carry signal from the previous signal transmission unit to charge a first control node, and a second Q logic generator to discharge the first control node; a second circuit to discharge a second control node according to a first control node voltage; and an output to output the carry signal and a gate signal based on potentials of the first and second control nodes. The second Q logic generator includes: a second-1 transistor and a second-2 transistor each respectively having a first electrode, a gate electrode, a back gate electrode, and a second electrode.

公开(公告)号：US11882742B2

公开(公告)日：2024-01-23

申请号：US17901516

申请日：2022-09-01

Applicant: LG Display Co., Ltd.

Inventor： Ki Min Son ,  Seok Noh ,  Ki Bok Park ,  Ye Won Hong

IPC: G09G3/20 ,  H10K59/131 ,  G09G3/3266 ,  G11C19/28 ,  H10K59/124

CPC classification number: H10K59/1315 ,  G09G3/2096 ,  G09G3/3266 ,  G11C19/28 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2330/021 ,  H10K59/124

Abstract: A display panel and an electronic device including the same are disclosed. A circuit layer of the display panel includes at least a first transistor and a second transistor. The first transistor includes a first oxide semiconductor pattern, a gate electrode, a first electrode in contact with one side of the first oxide semiconductor pattern, a second electrode in contact with the other side of the first oxide semiconductor pattern, and a first-first metal pattern disposed on the substrate to overlap the first oxide semiconductor pattern. The second transistor includes a second oxide semiconductor pattern, a gate electrode, a first electrode in contact with one side of the second oxide semiconductor pattern, a second electrode in contact with the other side of the second oxide semiconductor pattern, a first-second metal pattern disposed on the substrate to overlap the second oxide semiconductor pattern, and a second metal pattern disposed between the second oxide semiconductor pattern and the first-second metal pattern.